| 415 | -- | 435 | Heikki Kariniemi, Jari Nurmi. Performance Evaluation and Implementation of Two Adaptive Routing Algorithms for XGFT Networks |
| 437 | -- | 460 | Solaiman Rahim, Bruno Rouzeyre, Lionel Torres. A Flip-Flop Matching Engine to Verify Sequential Optimizations |
| 461 | -- | 486 | Lukás Sekanina, Stepan Friedl. An Evolvable Combinational Unit for FPGAs |
| 487 | -- | 499 | Nele Mentens, Siddika Berna Örs, Bart Preneel, Joos Vandewalle. An FPGA Implementation of a Montgomery Multiplier Over GF(2^m) |
| 501 | -- | 515 | Milos Drutarovský, Martin Simka, Viktor Fischer, Frederic Celle. A Simple PLL-Based True Random Number Generator for Embedded Digital Systems |
| 517 | -- | 535 | Thomas Kottke, Andreas Steininger. A Generic Dual Core Architecture with Error Containment |
| 537 | -- | 556 | A. Parreira, João Paulo Teixeira, Marcelino B. Santos. Built-In Self-Test Quality Assessment Using Hardware Fault Emulation In FPGAs |
| 557 | -- | 569 | Abhijit Ray, Wu Jigang, Thambipillai Srikanthan. Knapsack Model and Algorithm for Hardware/Software Partitioning Problem |