Journal: IEEE Computer

Volume 20, Issue 7

6 -- 7Roy L. Russo, W. K. King. Computer Society President's Message
12 -- 17José A. B. Fortes, Benjamin W. Wah. Guest Editors' Introduction: Systolic Arrays-From Concept to Implementation
18 -- 33Sun-Yuan Kung, Sheng-Chun Lo, Shiann-Ning Jean, Jenq-Neng Hwang. Wavefront Array Processors-Concept to Implementation
35 -- 43David E. Foulser, Robert Schreiber. The Saxpy Matrix-1: A General-Purpose Systolic Computer
45 -- 49Barry L. Drake, Franklin T. Luk, Jeffrey M. Speiser, Jerome J. Symanski. SLAPP: A Systolic Linear Algebra Parallel Processor
51 -- 63John V. McCanny, John G. McWhirter. Some Systolic Array Developments in the United Kingdom
65 -- 75Jacob A. Abraham, Prithviraj Banerjee, Chien-Yi Chen, W. Kent Fuchs, Sy-Yen Kuo, A. L. Narasimha Reddy. Fault Tolerance Techniques for Systolic Arrays
77 -- 89Juan J. Navarro, José M. Llabería, Mateo Valero. Partitioning: An Essential Step in Mapping Algorithms Into Systolic Array Processors
91 -- 0José A. B. Fortes, Benjamin W. Wah. Systolic Arrays: A Survey of Seven Projects
92 -- 93Carl Hein, Richard M. Zieger, Joseph A. Urbano. The Design of a GaAs Systolic Array for an Adaptive Null Steering Beamforming Controller
94 -- 95D. A. Kandle. A Systolic Signal Processor for Signal-Processing Applications
95 -- 0S. B. Leeland. An Advanced DSP Systolic-Array Architecture
96 -- 97J. Greg Nash, K. Wojtek Przytula, Siegfried Hansen. The Systolic/Cellular System for Signal Processing
98 -- 99Daniel P. Lopresti. P-NAC: A Systolic Array for Comparing Nucleic Acid Sequences
100 -- 101Wen-Tai Lin, Chi-Yuan Chin, Chung-Yih Ho. Integrating Systolic Arrays Into a Supersystem
102 -- 103Israel Koren, Irit Peled. The Concept and Implementation of Data-Driven Processor Arrays
104 -- 105C. Shaw, Will Tracz. The Open Channel