| 55 | -- | 58 | Hoon Sung Chwa, Jinkyu Lee 0001. Infeasibility Test for Fixed-Priority Scheduling on Multiprocessor Platforms |
| 59 | -- | 62 | Uppugunduru Anil Kumar, Sumit K. Chatterjee, Syed Ershad Ahmed. Low-Power Compressor-Based Approximate Multipliers With Error Correcting Module |
| 63 | -- | 66 | Muhammad Irfan 0004, Hasan Erdem Yantir, Zahid Ullah 0001, Ray C. C. Cheung. Comp-TCAM: An Adaptable Composite Ternary Content-Addressable Memory on FPGAs |
| 67 | -- | 70 | Surajit Das, Chandan Karfa. Arc Model and DDG: Deadlock Avoidance and Detection in Torus NoC |
| 71 | -- | 74 | Prabuddha Chakraborty, Jonathan Cruz, Christopher Posada, Sandip Ray, Swarup Bhunia. HASTE: Software Security Analysis for Timing Attacks on Clear Hardware Assumption |
| 75 | -- | 78 | Thomas Newton, James Timothy Meech, Phillip Stanley-Marbell. Machine Learning for Sensor Transducer Conversion Routines |
| 79 | -- | 82 | Luca Cassano, Antonio Miele, Francesco Mione, Nicola Tonellotto, Carlo Vallati. Design of Fault-Tolerant Distributed Cyber-Physical Systems for Smart Environments |
| 83 | -- | 86 | Myungsun Kim. Guaranteeing That Multilevel Prioritized DNN Models on an Embedded GPU Have Inference Performance Proportional to Respective Priorities |
| 87 | -- | 90 | Seongtae Lee, Sanghyeok Park, Jinkyu Lee 0001. Improved Low Time-Complexity Schedulability Test for Nonpreemptive EDF on a Multiprocessor |
| 91 | -- | 94 | Boris Dreyer, Christian Hochberger, Simon Wegener. Call String Sensitivity for Hardware-Based Hybrid WCET Analysis |
| 95 | -- | 98 | Ming Ling, Hongxi Li, Xiang Yu. A Quantitative Analysis and Optimization on the Cache Behavior Influenced by Literal Pools |
| 99 | -- | 102 | Ignacio M. Delgado-Lozano, Erica Tena-Sánchez, Juan Núñez 0002, Antonio J. Acosta 0001. Gate-Level Design Methodology for Side-Channel Resistant Logic Styles Using TFETs |
| 103 | -- | 106 | Nikhil Rangarajan, Johann Knechtel, Dinesh Rajasekharan, Ozgur Sinanoglu. SuperVAULT: Superparamagnetic Volatile Auxiliary Tamper-Proof Storage |
| 107 | -- | 110 | Giulio Galderisi, Thomas Mikolajick, Jens Trommer. Reconfigurable Field Effect Transistors Design Solutions for Delay-Invariant Logic Gates |