Journal: Embedded Systems Letters

Volume 14, Issue 4

163 -- 166Lin Bai 0002, Yiming Zhao, Xinming Huang 0001. Enabling 3-D Object Detection With a Low-Resolution LiDAR
167 -- 170Sudeep Pasricha. Embedded Systems Education: Experiences With Application-Driven Pedagogy
171 -- 174Hongge Li, Yuhao Chen. Hybrid Logic Computing of Binary and Stochastic
175 -- 178Uday Mallappa, Chung-Kuan Cheng, Bill Lin 0001. Joint Application-Aware Oblivious Routing and Static Virtual Channel Allocation
179 -- 182Liu Yang, Qi Wang 0041, Qianhui Li, Xiaolei Yu, Zongliang Huo. Reduce Refresh Operations on 3-D TLC nand Flash System via Wordline (WL) Interference
183 -- 186Mohammed Zubair M. Shamim. Hardware Deployable Edge-AI Solution for Prescreening of Oral Tongue Lesions Using TinyML on Embedded Devices
187 -- 190Yunho Oh, Ipoom Jeong, Won Woo Ro, Myung Kuk Yoon. CASH-RF: A Compiler-Assisted Hierarchical Register File in GPUs
191 -- 194Feng Min, Ying Wang 0001, Haobo Xu, Junpei Huang, Yujie Wang, Xingqi Zou, Meixuan Lu, Yinhe Han. Dadu-SV: Accelerate Stereo Vision Processing on NPU
195 -- 198Sören Tempel, Vladimir Herdt, Rolf Drechsler. Towards Quantification and Visualization of the Effects of Concretization During Concolic Testing
199 -- 202Minh Tri Le, Jenn-Jier James Lien. Lightweight Robotic Grasping Model Based on Template Matching and Depth Image
203 -- 206Yi Liu 0060, Rujia Guo, Changqing Xu, Weng Xiaodong, Yintang Yang. A Q-Learning-Based Fault-Tolerant and Congestion-Aware Adaptive Routing Algorithm for Networks-on-Chip

Volume 14, Issue 3

111 -- 114Caleb Beckwith, Harsh Sankar Naicker, Svara Mehta, Viba R. Udupa, Nghia Tri Nim, Varun Gadre, Hammond Pearce, Gary Mac, Nikhil Gupta 0002. Needle in a Haystack: Detecting Subtle Malicious Edits to Additive Manufacturing G-Code Files
115 -- 118Harsh Srivastava, Hammond Pearce, Gary Mac, Nikhil Gupta 0002. Determination of Fiber Content in 3-D Printed Composite Parts Using Image Analysis
119 -- 122Sangeun Oh, Kilho Lee. Supporting Safe Priority Adjustment for Software-Defined Real-Time Networking
123 -- 126Zhenwei Dai, Anshumali Shrivastava, Pedro Reviriego, José Alberto Hernández 0001. Optimizing Learned Bloom Filters: How Much Should Be Learned?
127 -- 130Priyanka Panigrahi, Vemuri Sahithya, Chandan Karfa, Prabhat Mishra 0001. Secure Register Allocation for Trusted Code Generation
131 -- 134Rijoy Mukherjee, Rajat Subhra Chakraborty. Novel Hardware Trojan Attack on Activation Parameters of FPGA-Based DNN Accelerators
135 -- 138Jennifer Switzer, Eric Siu, Subhash Ramesh, Ruohan Hu, Emanoel Zadorian, Ryan Kastner. Renée: New Life for Old Phones
139 -- 142Ebelechukwu Esimai, Marly Roncken. Flexible Active-Passive and Push-Pull Protocols
143 -- 146Yong Zheng, Haigang Yang, Yi Shu, Yiping Jia, Zhihong Huang. mTREE: A Customized Multicast-Enabled Tree-Based Network on Chip for AI Chips
147 -- 150Kris Nikov, Marcos Martínez, Simon Wegener, José L. Núñez-Yáñez, Zbigniew Chamski, Kyriakos Georgiou, Kerstin Eder. Robust and Accurate Fine-Grain Power Models for Embedded Systems With No On-Chip PMU
151 -- 154Prabuddha Chakraborty, Reiner N. Dizon-Paradis, Swarup Bhunia. ARTS: A Framework for AI-Rooted IoT System Design Automation
155 -- 158Hang Xiao, Haobo Xu, Xiaoming Chen 0003, Yujie Wang, Yinhe Han. Fast and High-Accuracy Approximate MAC Unit Design for CNN Computing
159 -- 162C. M. Krishna 0001. Global Voltage Scaling Across Multiple Cores for Real-Time Workloads

Volume 14, Issue 2

55 -- 58Hoon Sung Chwa, Jinkyu Lee 0001. Infeasibility Test for Fixed-Priority Scheduling on Multiprocessor Platforms
59 -- 62Uppugunduru Anil Kumar, Sumit K. Chatterjee, Syed Ershad Ahmed. Low-Power Compressor-Based Approximate Multipliers With Error Correcting Module
63 -- 66Muhammad Irfan 0004, Hasan Erdem Yantir, Zahid Ullah 0001, Ray C. C. Cheung. Comp-TCAM: An Adaptable Composite Ternary Content-Addressable Memory on FPGAs
67 -- 70Surajit Das, Chandan Karfa. Arc Model and DDG: Deadlock Avoidance and Detection in Torus NoC
71 -- 74Prabuddha Chakraborty, Jonathan Cruz, Christopher Posada, Sandip Ray, Swarup Bhunia. HASTE: Software Security Analysis for Timing Attacks on Clear Hardware Assumption
75 -- 78Thomas Newton, James Timothy Meech, Phillip Stanley-Marbell. Machine Learning for Sensor Transducer Conversion Routines
79 -- 82Luca Cassano, Antonio Miele, Francesco Mione, Nicola Tonellotto, Carlo Vallati. Design of Fault-Tolerant Distributed Cyber-Physical Systems for Smart Environments
83 -- 86Myungsun Kim. Guaranteeing That Multilevel Prioritized DNN Models on an Embedded GPU Have Inference Performance Proportional to Respective Priorities
87 -- 90Seongtae Lee, Sanghyeok Park, Jinkyu Lee 0001. Improved Low Time-Complexity Schedulability Test for Nonpreemptive EDF on a Multiprocessor
91 -- 94Boris Dreyer, Christian Hochberger, Simon Wegener. Call String Sensitivity for Hardware-Based Hybrid WCET Analysis
95 -- 98Ming Ling, Hongxi Li, Xiang Yu. A Quantitative Analysis and Optimization on the Cache Behavior Influenced by Literal Pools
99 -- 102Ignacio M. Delgado-Lozano, Erica Tena-Sánchez, Juan Núñez 0002, Antonio J. Acosta 0001. Gate-Level Design Methodology for Side-Channel Resistant Logic Styles Using TFETs
103 -- 106Nikhil Rangarajan, Johann Knechtel, Dinesh Rajasekharan, Ozgur Sinanoglu. SuperVAULT: Superparamagnetic Volatile Auxiliary Tamper-Proof Storage
107 -- 110Giulio Galderisi, Thomas Mikolajick, Jens Trommer. Reconfigurable Field Effect Transistors Design Solutions for Delay-Invariant Logic Gates

Volume 14, Issue 1

1 -- 2Preeti Ranjan Panda. Editorial
3 -- 6Sofiane Chetoui, Sherief Reda. CasCon: Cascaded Thermal and Electrical Current Throttling for Mobile Devices
7 -- 10Liu Yang, Qi Wang, Qianhui Li, Xiaolei Yu, Jing He, Zongliang Huo. Gradual Channel Estimation Method for TLC NAND Flash Memory
11 -- 14Wei Chen, Peng Hao, Dake Liu, Yong Bai. Compilation of Parallel Data Access for Vector Processor in Radio Base Stations
15 -- 18EunJin Jeong, Jangryul Kim, Samnieng Tan, Jaeseong Lee, Soonhoi Ha. Deep Learning Inference Parallelization on Heterogeneous Processors With TensorRT
19 -- 22Francisco Pajuelo-Holguera, José M. Granado Criado, Juan Antonio Gómez Pulido. Fast Montgomery Modular Multiplier Using FPGAs
23 -- 26Liping Wang, Saideep Tiku, Sudeep Pasricha. CHISEL: Compression-Aware High-Accuracy Embedded Indoor Localization With Deep Learning
27 -- 30Mohammed Zubair M. Shamim, Sattam Alotaibi, Hany S. Hussein, Mohammed Farrag, Mohammad Shiblee. Diagnostic Accuracy of Smartphone-Connected Electrophysiological Biosensors for Prediction of Blood Glucose Level in a Type-2 Diabetic Patient Using Machine Learning: A Pilot Study
31 -- 34Raja Sekar Kumaresan, Marshal Raj, G. Lakshminarayanan. High-Speed Serial-Parallel Multiplier in Quantum-Dot Cellular Automata
35 -- 38Ali Zahir, Anees Ullah, Pedro Reviriego, Syed Riaz Ul Hassnain. Efficient Leading Zero Count (LZC) Implementations for Xilinx FPGAs
39 -- 42Mohammad Ashjaei, Lejla Murselovic, Saad Mubeen. Implications of Various Preemption Configurations in TSN Networks
43 -- 46Michael Barrow, Francesco Restuccia, Mustafa S. Gobulukoglu, Enrico Rossi, Ryan Kastner. A Remote Control System for Emergency Ventilators During SARS-CoV-2
47 -- 50Mahmood Rafiee, Nabiollah Shiri, Ayoub Sadeghi. High-Performance 1-Bit Full Adder With Excellent Driving Capability for Multistage Structures
51 -- 54A. Alper Goksoy, Anish Krishnakumar, Md Sahil Hassan, Allen-Jasmin Farcas, Ali Akoglu, Radu Marculescu, Ümit Y. Ogras. DAS: Dynamic Adaptive Scheduling for Energy-Efficient Heterogeneous SoCs