researchr
explore
Tags
Journals
Conferences
Authors
Profiles
Groups
calendar
New Conferences
Events
Deadlines
search
search
You are not signed in
Sign in
Sign up
External Links
Journal: Formal Methods in System Design
Home
Index
Info
Volume
Volume
31
, Issue
3
197
--
219
A. Prasad Sistla
,
Xiaodong Wang
,
Min Zhou
.
Checking extended ::::CTL:::: properties using guarded quotient structures
221
--
239
Clark W. Barrett
,
Leonardo Mendonça de Moura
,
Aaron Stump
.
Design and results of the 2nd annual satisfiability modulo theories competition (SMT-COMP 2006)
241
--
263
Zoltán Ádám Mann
,
András Orbán
,
Péter Arató
.
Finding optimal hardware/software partitions
265
--
279
Salvatore La Torre
,
Margherita Napoli
,
Mimmo Parente
.
The word problem for visibly pushdown languages described by grammars
281
--
305
Thuan Quang Huynh
,
Abhik Roychoudhury
.
Memory model sensitive bytecode verification
Volume
31
, Issue
2
101
--
134
Béatrice Bérard
,
Paul Gastin
,
Antoine Petit
.
Timed substitutions for regular signal-event languages
135
--
175
Patricia Bouyer
,
Thomas Brihaye
,
Véronique Bruyère
,
Jean-François Raskin
.
On the optimal reachability problem of weighted timed automata
177
--
196
Roberto Sebastiani
,
Eli Singerman
,
Stefano Tonetta
,
Moshe Y. Vardi
.
GSTE is partitioned model checking
Volume
31
, Issue
1
1
--
33
Roberto Passerone
,
Jerry R. Burch
,
Alberto L. Sangiovanni-Vincentelli
.
Refinement preserving approximations for the design and verification of heterogeneous systems
35
--
61
Abhay Vardhan
,
Mahesh Viswanathan
.
Learning to verify branching time properties
63
--
100
Gianfranco Ciardo
,
Gerald Lüttgen
,
Andrew S. Miner
.
Exploiting interleaving semantics in symbolic state-space generation