| 131 | -- | 141 | Kyohei Chiba, Hiro Ito. Sublinear Computation Paradigm: Constant-Time Algorithms and Sublinear Progressive Algorithms |
| 142 | -- | 0 | Shoichi Hirose. Foreword |
| 143 | -- | 159 | Toi Tomita, Wakaha Ogata, Kaoru Kurosawa. Boosting CPA to CCA2 for Leakage-Resilient Attribute-Based Encryption by Using New QA-NIZK |
| 160 | -- | 172 | Keisuke Hara, Takahiro Matsuda 0002, Keisuke Tanaka. Receiver Selective Opening Chosen Ciphertext Secure Identity-Based Encryption |
| 173 | -- | 181 | Yuji Hashimoto, Koji Nuida, Goichiro Hanaoka. Tight Security of Twin-DH Hashed ElGamal KEM in Multi-User Setting |
| 182 | -- | 194 | Eiichiro Fujisaki. Improving Practical UC-Secure Commitments based on the DDH Assumption |
| 195 | -- | 202 | Xiaoling Yu, Yuntao Wang 0002, Chungen Xu, Tsuyoshi Takagi. Revisiting the Orthogonal Lattice Algorithm in Solving General Approximate Common Divisor Problem |
| 203 | -- | 213 | Yoshifumi Saito, Wakaha Ogata. Private Decision Tree Evaluation by a Single Untrusted Server for Machine Learnig as a Service |
| 214 | -- | 230 | Hikaru Tsuchida, Takashi Nishide, Yusaku Maeda. Private Decision Tree Evaluation with Constant Rounds via (Only) SS-3PC over Ring and Field |
| 231 | -- | 241 | Kota Sasaki, Koji Nuida. Efficiency and Accuracy Improvements of Secure Floating-Point Addition over Secret Sharing |
| 242 | -- | 267 | Cheng Shi, Kazuki Yoneyama. Formal Verification of Fair Exchange Based on Bitcoin Smart Contracts |
| 268 | -- | 277 | Kazuto Shimizu, Kosei Sakamoto, Takanori Isobe 0001. Applying Byte-Shuffling to CLEFIA-Type Structure |
| 278 | -- | 288 | Kosei Sakamoto, Kazuhiko Minematsu, Nao Shibata, Maki Shigeri, Hiroyasu Kubo, Takanori Isobe 0001. Design of a Linear Layer for a Block Cipher Based on Type-2 Generalized Feistel Network with 32 Branches |
| 289 | -- | 299 | Go Takami, Takeshi Sugawara, Kazuo Sakiyama, Yang Li. Mixture-Based 5-Round Physical Attack against AES: Attack Proposal and Noise Evaluation |
| 300 | -- | 310 | Yuta Fukuda, Kota Yoshida, Takeshi Fujino. Fault Injection Attacks Utilizing Waveform Pattern Matching against Neural Networks Processing on Microcontroller |
| 311 | -- | 325 | Junko Takahashi, Keiichi Okabe, Hiroki Itoh, Xuan Thuy Ngo, Sylvain Guilley, Ritu Ranjan Shrivastwa, Mushir Ahmed, Patrick Lejoly. Machine Learning Based Hardware Trojan Detection Using Electromagnetic Emanation |
| 326 | -- | 335 | Kota Yoshida, Masaya Hojo, Takeshi Fujino. Adversarial Scan Attack against Scan Matching Algorithm for Pose Estimation in LiDAR-Based SLAM |
| 336 | -- | 343 | Tatsuya Oyama, Shunsuke Okura, Kota Yoshida, Takeshi Fujino. Experimental Study of Fault Injection Attack on Image Sensor Interface for Triggering Backdoored DNN Models |
| 344 | -- | 0 | Ken-ichi Iwata, Hiroshi Kamabe. Foreword |
| 345 | -- | 352 | Mikihiko Nishiara. Channel Coding with Cost Paid on Delivery |
| 353 | -- | 362 | Tetsunao Matsuta, Tomohiko Uyematsu. An Equivalent Expression for the Wyner-Ziv Source Coding Problem |
| 363 | -- | 371 | Toshihiro Niinomi, Hideki Yagi, Shigeichi Hirasawa. Upper Bounds on the Error Probability for the Ensemble of Linear Block Codes with Mismatched Decoding |
| 372 | -- | 380 | Takuya Ohara, Makoto Takita, Masakatu Morii. A Construction of Binary Punctured Linear Codes and A Supporting Method for Best Code Search |
| 381 | -- | 388 | Ramy F. Taki ElDin, Hajime Matsui. Linking Reversed and Dual Codes of Quasi-Cyclic Codes |
| 389 | -- | 403 | Toru Nakanishi 0001, Hiromi Yoshino, Tomoki Murakami, Guru-Vamsi Policharla. Efficient Zero-Knowledge Proofs of Graph Signature for Connectivity and Isolation Using Bilinear-Map Accumulator |
| 404 | -- | 416 | Keitaro Hiwatashi, Satsuya Ohata, Koji Nuida. An Efficient Secure Division Protocol Using Approximate Multi-Bit Product and New Constant-Round Building Blocks |
| 417 | -- | 424 | Lantian Wei, Shan Lu 0003, Hiroshi Kamabe, Jun Cheng 0001. User Identification and Channel Estimation by Iterative DNN-Based Decoder on Multiple-Access Fading Channel |
| 425 | -- | 427 | Shota Saito, Toshiyasu Matsushima. Upper Bound on Privacy-Utility Tradeoff Allowing Positive Excess Distortion Probability |
| 428 | -- | 432 | Tatsumi Konishi, Hiroyuki Nakano, Yoshikazu Yano, Michihiro Aoki. m Fading MIMO Channels |
| 433 | -- | 435 | Yasushi Esaki, Yuta Nakahara, Toshiyasu Matsushima. The Ratio of the Desired Parameters of Deep Neural Networks |
| 436 | -- | 0 | Yoshinori Takeuchi. Foreword |
| 437 | -- | 447 | Mineto Tsukada, Hiroki Matsutani. An Overflow/Underflow-Free Fixed-Point Bit-Width Optimization Method for OS-ELM Digital Circuit |
| 448 | -- | 458 | Yasuhiro Nakahara, Masato Kiyama, Motoki Amagasaki, Qian Zhao 0001, Masahiro Iida. Reconfigurable Neural Network Accelerator and Simulator for Model Implementation |
| 459 | -- | 467 | Tatsuma Mori, Taito Manabe, Yuichiro Shibata. A Hardware Oriented Approximate Convex Hull Algorithm and its FPGA Implementation |
| 468 | -- | 477 | Taito Manabe, Taichi Katayama, Yuichiro Shibata. FPGA Implementation of a Stream-Based Real-Time Hardware Line Segment Detector |
| 478 | -- | 486 | Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda. A 6.5Gb/s Shared Bus Using Electromagnetic Connectors for Downsizing and Lightening Satellite Processor System |
| 487 | -- | 496 | Yuki Imai, Shinichi Nishizawa, Kazuhito Ito. Reduction of LSI Maximum Power Consumption with Standard Cell Library of Stack Structured Cells |
| 497 | -- | 508 | TaiYu Cheng, Yutaka Masuda, Jun Nagayama, Yoichi Momiyama, Jun Chen, Masanori Hashimoto. Activation-Aware Slack Assignment Based Mode-Wise Voltage Scaling for Energy Minimization |
| 509 | -- | 517 | Yutaka Masuda, Jun Nagayama, TaiYu Cheng, Tohru Ishihara, Yoichi Momiyama, Masanori Hashimoto. Low-Power Design Methodology of Voltage Over-Scalable Circuit with Critical Path Isolation and Bit-Width Scaling |
| 518 | -- | 529 | Takumi Komori, Yutaka Masuda, Jun Shiomi, Tohru Ishihara. Approximate Minimum Energy Point Tracking and Task Scheduling for Energy-Efficient Real-Time Computing |
| 530 | -- | 539 | Yuya Kitazawa, Kazuhito Ito. Register Minimization and its Application in Schedule Exploration for Area Minimization for Double Modular Redundancy LSI Design |
| 540 | -- | 548 | Hiroki Nishikawa, Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama. Simultaneous Scheduling and Core-Type Optimization for Moldable Fork-Join Tasks on Heterogeneous Multicores |
| 549 | -- | 561 | Abdul Hayee Shaikh, Xiaoyu Dang, Imran A. Khoso, Daqing Huang. Three-Stage Padding Configuration for Sparse Arrays with Larger Continuous Virtual Aperture and Increased Degrees of Freedom |
| 562 | -- | 570 | Koki Yamada, Taishin Nakamura, Hisashi Yamamoto. n): F Lattice Systems |
| 571 | -- | 575 | Ryutaroh Matsumoto, Manabu Hagiwara. t-Deletion-Correcting Quantum Codes |
| 576 | -- | 583 | Tingyao Wu, Zhisong Bie, Celimuge Wu. A Sparsely-Connected OTFS-BFDM System Using Message-Passing Decoding |
| 584 | -- | 593 | Suresh Jaganathan, Sathya Madhusudhanan. Polarity Classification of Social Media Feeds Using Incremental Learning - A Deep Learning Approach |
| 594 | -- | 597 | Yuki Horiguchi, Yusuke Ito, Aohan Li, Mikio Hasegawa. A Localization Method Based on Partial Correlation Analysis for Dynamic Wireless Network |
| 598 | -- | 602 | Lige Ge, Shengming Jiang, Xiaowei Wang, YanLi Xu, Ruoyu Feng, Zhichao Zheng 0005. Link Availability Prediction Based on Machine Learning for Opportunistic Networks in Oceans |
| 603 | -- | 606 | Chun'e Zhao, Yuhua Sun, Tongjiang Yan, Xubo Zhao. Balanced Whiteman Generalized Cyclotomic Sequences with Maximal 2-adic Complexity |
| 607 | -- | 610 | Xubo Zhao, Xiaoping Li, Runzhi Yang, Qingqing Zhang, Jinpeng Liu. On Hermitian LCD Generalized Gabidulin Codes |