External Links

    Journal: International Journal of Parallel Programming

    Volume 24, Issue 6

    479 -- 480Chua-Huang Huang, P. Sadayappan. Introduction
    481 -- 512Rastislav Bodík, Rajiv Gupta. Array Data Flow Analysis for Load-Store Optimizations in Fine-Grained Architectures
    513 -- 546Béatrice Creusillet, François Irigoin. Interprocedural Array Region Analyses
    547 -- 578Rakesh Ghiya, Laurie J. Hendren. Connection Analysis: A Practical Interprocedural Heap Analysis for C
    579 -- 598Wayne Kelly, William Pugh, Evan Rosser, Tatiana Shpeisman. Transitive Closure of Infinite Graphs and its Applications
    599 -- 620Thomas J. Sheffler, Robert Schreiber, William Pugh, John R. Gilbert, Siddhartha Chatterjee. Efficient Distribution Analysis via Graph Contraction

    Volume 24, Issue 5

    397 -- 432Lesley R. Matheson, Robert Endre Tarjan. Parallelism in multigrid methods: How much is too much?
    433 -- 478Kish Shen, Manuel V. Hermenegildo. High-level characteristics of or- and independent and-parallelism in prolog

    Volume 24, Issue 4

    249 -- 376Evan Torrie, Margaret Martonosi, Mary W. Hall, Chau-Wen Tseng. Memory Referencing Behavior in Compiler-Parallelized Applications
    291 -- 318Dean Engelhardt, Andrew L. Wendelborn. A Partitioning-Independent Paradigm for Nested Data Parallelism
    319 -- 348Herbert H. J. Hum, Olivier Maquelin, Kevin B. Theobald, Xinmin Tian, Guang R. Gao, Laurie J. Hendren. A Study of the EARTH-MANNA Multithreaded System
    377 -- 396Thomas L. Sterling, Daniel Savarese, Phillip Merkey, Kevin Olson. An Empirical Evaluation of the Convex SPP-1000 Hierarchical Shared Memory System

    Volume 24, Issue 3

    207 -- 208Jean-Luc Gaudiot. Guest Editor's Introduction
    209 -- 234Po-Yung Chang, Eric Hao, Yale N. Patt, Pohua P. Chang. Using Predicated Execution to Improve the Performance of a Dynamically Scheduled Machine with Speculative Execution
    235 -- 264David H. Albonesi, Israel Koren. A Mean Analysis Multiprocessor Model Incorporating Superscalar Processors and Latency Tolerating Techniques
    265 -- 290Michel Cosnard, Michel Loi. A Simple Algorithm for the Generation of Efficient Loop Structures

    Volume 24, Issue 2

    103 -- 132Alexandre E. Eichenberger, Edward S. Davidson, Santosh G. Abraham. Minimizing Register Requirements of a Modulo Schedule via Optimum Stage Scheduling
    133 -- 158Po-Yung Chang, Eric Hao, Tse-Yu Yeh, Yale N. Patt. Branch Classification: New Mechanism for Improving Branch Predictor Performance
    159 -- 186Gary S. Tyson, Matthew K. Farrens. Evaluating the Effects of Predicated Execution on Branch Prediction
    187 -- 206Thomas M. Conte, Burzin A. Patel, Kishore N. Menezes, J. Stan Cox. Hardware-Based Profiling: An Effective Technique for Profile-Driven Optimization

    Volume 24, Issue 1

    1 -- 2Matthew K. Farrens, Wen-mei Hwu. Guest Editors' Introduction
    3 -- 65B. Ramakrishna Rau. Iterative Modulo Scheduling
    65 -- 102Michael S. Schlansker, Vinod Kathail, Sadun Anik. Parallelization of Control Recurrences for ILP Processors
    runs on