Journal: JETC

Volume 7, Issue 4

14 -- 0Montek Singh, Steven M. Nowick. Introduction to Special Issue: Asynchrony in System Design
15 -- 0Marco Vacca, Mariagrazia Graziano, Maurizio Zamboni. Asynchronous Solutions for Nanomagnetic Logic Circuits
16 -- 0Xuefu Zhang, Delong Shang, Fei Xia, Alex Yakovlev. A Novel Power Delivery Method for Asynchronous Loads in Energy Harvesting Systems
17 -- 0Luis A. Plana, David M. Clark, Simon Davidson, Steve Furber, Jim D. Garside, Eustace Painkras, Jeffrey Pepper, Steve Temple, John Bainbridge. SpiNNaker: Design and Implementation of a GALS Multicore System-on-Chip
18 -- 0Marc Galceran Oms, Alexander Gotmanov, Jordi Cortadella, Michael Kishinevsky. Microarchitectural Transformations Using Elasticity
19 -- 0Basit Riaz Sheikh, Rajit Manohar. Energy-Efficient Pipeline Templates for High-Performance Asynchronous Circuits
20 -- 0Philippe Matherat, Marc-Thierry Jaekel. Relativistic Causality and Clockless Circuits

Volume 7, Issue 3

10 -- 0Meng Zhang, Niraj K. Jha. FinFET-Based Power Management for Improved DPA Resistance with Low Overhead
11 -- 0Byung-Soo Choi, Rodney Van Meter. On the Effect of Quantum Interaction Distance on Quantum Addition Circuits
12 -- 0Sezer Gören, H. Fatih Ugurdag, Okan Palaz. Defect-Aware Nanocrossbar Logic Mapping through Matrix Canonization Using Two-Dimensional Radix Sort
13 -- 0Rajeswari Devadoss, Kolin Paul, M. Balakrishnan. p-QCA: A Tiled Programmable Fabric Architecture Using Molecular Quantum-Dot Cellular Automata

Volume 7, Issue 2

5 -- 0Li Shang, Qianfan Xu. Introduction to nanophotonic communication technology integration
6 -- 0Raymond G. Beausoleil. Large-scale integrated photonics for high-performance interconnects
7 -- 0Aleksandr Biberman, Kyle Preston, Gilbert Hendry, Nicolás Sherwood-Droz, Johnnie Chan, Jacob S. Levy, Michal Lipson, Keren Bergman. Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors
8 -- 0Zheng Li, Moustafa Mohamed, Xi Chen, Hongyu Zhou, Alan Rolf Mickelson, Li Shang, Manish Vachharajani. Iris: A hybrid nanophotonic network design for high-performance and low-power on-chip communication
9 -- 0Mark J. Cianchetti, David H. Albonesi. A low-latency, high-throughput on-chip optical router architecture for future chip multiprocessors

Volume 7, Issue 1

1 -- 0Shamik Das, Garrett S. Rose. Introduction to Special Issue: Highlights of NANOARCH 09
2 -- 0Aaron Dingler, Michael T. Niemier, Xiaobo Sharon Hu, Evan Lent. Performance and Energy Impact of Locally Controlled NML Circuits
3 -- 0Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O Connor, Junchen Liu, Maimouna Amadou, Gabriela Nicolescu. Matrix Nanodevice-Based Logic Architectures and Associated Functional Mapping Method
4 -- 0Nor Zaidi Haron, Said Hamdioui. Redundant Residue Number System Code for Fault-Tolerant Hybrid Memories