| 221 | -- | 222 | Juan Antonio Gómez Pulido. From systems to networks on chip: A promising research area in the Hardware/Software co-design |
| 223 | -- | 232 | Sébastien Le Beux, Guy Bois, Gabriela Nicolescu, Youcef Bouchebaba, Michel Langevin, Pierre G. Paulin. Combining mapping and partitioning exploration for NoC-based embedded systems |
| 233 | -- | 241 | Ser-Hoon Lee, Yeo-Chan Yoon, Sun Young Hwang. Communication-aware task assignment algorithm for MPSoC using shared memory |
| 242 | -- | 255 | Amit Kumar Singh, Thambipillai Srikanthan, Akash Kumar, Wu Jigang. Communication-aware heuristics for run-time task mapping on NoC-based MPSoC platforms |
| 256 | -- | 264 | Pejman Lotfi-Kamran, Amir-Mohammad Rahmani, Masoud Daneshtalab, Ali Afzali-Kusha, Zainalabedin Navabi. EDXY - A low cost congestion-aware routing algorithm for network-on-chips |
| 265 | -- | 277 | Ahsan Shabbir, Akash Kumar, Sander Stuijk, Bart Mesman, Henk Corporaal. CA-MPSoC: An automated design flow for predictable multi-processor architectures for multiple applications |
| 278 | -- | 292 | Mouna Baklouti, Yassine Aydi, Philippe Marquet, Jean-Luc Dekeyser, Mohamed Abid. Scalable mpNoC for massively parallel systems - Design and implementation on FPGA |
| 293 | -- | 302 | Yana Esteves Krasteva, Eduardo de la Torre, Teresa Riesgo. Reconfigurable Networks on Chip: DRNoC architecture |