| 1 | -- | 5 | K. P. Judmann. EUROMICRO 1995 - Short Contributions |
| 7 | -- | 14 | Stefan A. Kühn, Michael B. Kleiner, Werner Weber. Multiparallel systolic arrays for multidimensional FFT-architectures on 3D-VLSI |
| 15 | -- | 22 | Alberto Ferreira de Souza, Edil S. Tavares Fernandes, Andrew Wolfe. On the balance of VLIW architectures |
| 23 | -- | 26 | István Vassányi. FPGAs and cellular algorithms: Two implementation examples |
| 27 | -- | 32 | Marek Tudruj. Dynamically reconfigurable heterogeneous multi-processor systems with transputer-controlled communication |
| 33 | -- | 37 | José M. Fernández, Félix Moreno, Juan M. Meneses. An approach to the design of RISC core processors for VLSI embedded systems |
| 39 | -- | 46 | Simon A. Trainis. Modelling the hardware cost of full register bypassing in a multiple instruction issue processor |
| 47 | -- | 57 | Miroslav Svéda. Design method, fail-stop safety model, and embedded application |
| 59 | -- | 65 | A. D. Hudson, D. A. Sanders, H. Golding, G. E. Tewkesbury, H. Cawte. Aspects of an expert design system for the wastewater treatment industry |
| 67 | -- | 72 | I. J. Stott, D. A. Sanders, M. J. Goodwin. A software algorithm for the intelligent mixing of inputs to a tele-operated vehicle |
| 73 | -- | 79 | M. J. Goodwin, D. A. Sanders, G. A. Poland, I. J. Stott. Navigational assistance for disabled wheelchair-users |
| 81 | -- | 85 | Gregor Vrecko, Zmago Brezocnik, Tatjana Kapus, Bogomir Horvat, Andrej Duh. Microcomputer unit for control of distributed devices over computer networks |
| 87 | -- | 98 | Erik Stoy, Zebo Peng. Inter-domain movement of functionality as a repartitioning strategy for hardware/software co-design |
| 99 | -- | 109 | Karl M. Göschka. Generation of firmwarecompilers |
| 111 | -- | 117 | Byung-gi Kim, Hoon Chang, Jung Wan Cho. Methodology for ensuring high reliability of VLSI systems |
| 119 | -- | 122 | Jordi Riera, Lluis Ribas, A. Josep Velasco, Jordi Carrabina. Deriving cost functions from cell libraries and real ICs to allow real area-power-delay trade-off in early stages of logic synthesis |
| 123 | -- | 127 | Juraj Povazanec, Vladislav Musil. Fault and test-process modelling for integrated circuits |
| 129 | -- | 134 | Manuel L. Anido, C. E. T. Oliveira, Vladimir C. Alves. An environment to perform functional tests on boards and integrated circuits |
| 135 | -- | 141 | Gabriella Dodero, R. Valia. Pipelined programming in PVM |
| 143 | -- | 153 | Miroslaw Thor. A multi-thread approach reducing program execution time in a heterogeneous reconfigurable multi-processor architecture |
| 155 | -- | 162 | Doron Darmon, Helnye Azaria. Asynchronous Process Simulator for Parallel Systems (APSPS) 1 |
| 163 | -- | 165 | Ferenc Vajda. Implementation issues of the Hough Transform |
| 167 | -- | 173 | Giulio Iannello, Stefano Russo. PVM communication performance over an ATM MAN |
| 175 | -- | 184 | Donghee Lee, Youngtack Jin, Yookun Cho. Fast networking based on the STREAMS mechanism with fast module scheduling |
| 185 | -- | 188 | Youngsong Mun, Kyung-Sun Min, Youngsik Kim. Performance evaluation of switching networks |
| 189 | -- | 191 | Joshua Etkin. Language-based communication protocols for distributed systems |
| 193 | -- | 198 | Gianfranco Ciccarella, Giuseppe Donatelli, Roberto Piermarini. A nonlinear predistortion technique for radio channels: Algorithms and implementation problems |
| 199 | -- | 202 | Jürgen Lampe. A tool for syntax directed software design |
| 203 | -- | 210 | Viljem Zumer, Nikolaj Korbar, Marjan Mernik. Automatic implementation of programming languages using object oriented approach |
| 211 | -- | 213 | Jakob Axelsson. A portable model for predicting the size and execution time of programs |
| 215 | -- | 227 | Waldemar Wieczerzycki. Advanced versioning mechanisms supporting CSCW environments |
| 229 | -- | 243 | George Samaras, Andrew Citron, Ajay D. Kshemkalyani. Reconciling chained and unchained transactional support for distributed systems |
| 245 | -- | 254 | Taekyung Byun, Songchun Moon. Nonblocking two-phase commit protocol to avoid unnecessary transaction abort for distributed systems |
| 255 | -- | 266 | Youngkon Lee, Songchun Moon. Dynamic replication control scheme using logical configuration information: DYRECT |
| 267 | -- | 276 | Wonsup Lee, Haengrae Cho, Songchun Moon. Group-oriented catalog allocation in heterogeneous distributed database systems |
| 277 | -- | 283 | Hyeokman Kim, Sukho Lee, Hyoung-Joo Kim. A cost model for sort-domain traversal strategy in object-oriented databases |
| 285 | -- | 290 | Hwan-Seung Yong, Sukho Lee. A storage structure for nested relations using signatures |
| 291 | -- | 295 | Krzysztof Goczyla. Exploiting class hierarchy for effective parallelisation of processing in object-oriented database systems |
| 297 | -- | 305 | Kisoo Han, Songchun Moon. Group checkpointing scheme for partition failure recovery in mobile database systems: GCS/MD |
| 307 | -- | 316 | Hyung-Il Choi, Gye-Young Kim. Motion interpretation by analyzing difference images |
| 317 | -- | 325 | Massimo Bertozzi, Alberto Broggi, Stefano Castelluccio. A real-time oriented system for vehicle detection |
| 327 | -- | 335 | S. L. Chen, E-ren Chuang, W. S. Hsieh. VISUAL: An object oriented language for image understanding |
| 337 | -- | 340 | Desmond Phillips, Alan Purvis, Simon Johnson. On an efficient VLSI architecture for the multirate additive synthesis of musical tones |
| 341 | -- | 344 | Andrew M. Tyrrell, Tim S. Brookes, David M. Howard. T9000 and T800 transputers: A real-time application |
| 345 | -- | 353 | Mohamed Ould-Khaoua, Reza Sotudeh. Performance evaluation of hypermeshes and meshes with wormhole routing |
| 355 | -- | 363 | Youngsik Kim, Oh-Young Kwon, Tack-Don Han, Youngsong Mun. Design and performance analysis of the Practical Fat Tree Network using a butterfly network |
| 365 | -- | 370 | Dragana Milutinovic. Mapping of interconnection networks for parallel processing onto the advanced sea-of-gates VLSI |