Journal: Microprocessors and Microsystems

Volume 18, Issue 9

499 -- 500Jim E. Cooling. Hard real-time embedded operating systems
501 -- 511Barbara Korousic-Seljak. Task scheduling policies for real-time systems
513 -- 521Steven Bradley, William Henderson, David Kendall, Adrian Robson. A formally based hard real-time kernel
523 -- 535Damjan Zazula, Andrej Sostaric, Danilo Korze, Dean Korosec. Computer-assisted exercise ECG analysis: real-time scheduling within MS-DOS on PCs
537 -- 546Jens-Uwe Dzikowski, Peter Rounce. Using databases to support the development of microcode
547 -- 560Bradly K. Fawcett. System-integration features and development tools key to FPGA design

Volume 18, Issue 8

427 -- 428Martyn Edwards. Logic synthesis
429 -- 437Tadeusz Luba. Multi-level logic synthesis based on decomposition
439 -- 449A. J. W. M. ten Berg. MASCOT: Microarchitecture synthesis of control paths
451 -- 457James Pardey, Alain Amroun, Martin Bolton, Marian Adamski. Parallel controller synthesis for programmable logic devices
459 -- 467M. S. Abrahams, A. Rushton. Translation of VHDL for logic synthesis
469 -- 472Otmar von Steuber, Hans Martin Lipp. ARTUS - an open framework for logic synthesis
473 -- 479S. J. McIlroy, Noel E. Evans. An encoding telemeter for climatic temperature monitoring using a single chip microcontroller
481 -- 488K. Vijayan Asari, C. Eswaran. Systolic array implementation of artificial neural networks
489 -- 490Martyn Edwards. Logic synthesis and optimization : Edited by T Sasao Kluwer Academic Publishers, Dordrecht, The Netherlands (1993) ISBN 0 7923 9308 2, Dfl 181.25, £66.75, pp 375
489 -- 0Martin Bolton. High-level synthesis : D D Gajaski, N D Dutt, A C-H Wu and S Y-L Lin Kluwer Academic Publishers, Dordrecht, The Netherlands (1992) ISBN 0 7923 9194 2, £62.95, pp 359
490 -- 491Alain Amroun. The synthesis approach to digital systems design : P Michel, U Lauther and P Duzy Kluwer Academic Publishers, Dordrecht, The Netherlands (1992) ISBN 0 7923 9199 3, £57.50, pp 432
491 -- 492David G. Hendry. High level synthesis for real-time digital signal processing : J Vanhoof, K V Rompaey, I Bolsens, G Goossens and H De Man Kluwer Academic Publishers, Dordrecht, The Netherlands (1993) ISBN 0 792 393139, Dfl 177.00, £65.25, pp 302

Volume 18, Issue 7

371 -- 376Tatsuhiro Torii, Michael Singh Chelian. A new fault-tolerant multitransputer configuration for avionics two-lane systems
377 -- 383M. Moshgbar, Robert M. Parkin. An intelligent distributed system for real-time control of cone crushers
385 -- 392Jim E. Cooling, T. S. Hughes. Making formal specifications accessible through the use of animation prototyping
393 -- 400Anand V. Hudli, Raghu V. Hudli. Finding small feedback vertex sets for VLSI circuits
401 -- 407Y. K. Wong, Ahmad B. Rad. Comparison of the performance of a fuzzy controller with a PID controller for a heating process

Volume 18, Issue 6

307 -- 314Nadarajah Sriskanthan, Amitabha Das, Peter K. K. Loh, Ang Hock Leong. An adaptive switching architecture for multiprocessor networks
315 -- 322T. Sánchez, J. J. Anaya, C. Fritsch. Performance of the IMS A100 digital signal processor for real-time deconvolution
323 -- 330N. Chen, G. A. Parker. Design of a robot control system architecture
331 -- 341Salvatore Cavalieri, Antonella Di Stefano, Orazio Mirabella. Artificial neural networks on a reconfigurable, fault-tolerant, multi-processor system
343 -- 350Panagiotis Tzionas, Philippos Tsalides, Adonios Thanailakis. A modified discrete Fourier-cosine transform algorithm and its VLSI implementation
351 -- 362Bob Fine, Gerald McGuire. Considerations for selecting a DSP processor (ADSP-2101 vs. TMS320C50)
363 -- 0Geoff Carpenter. Reliability in Instrumentation and Control: J C Cluley Butterworth-Heinemann, Oxford, UK (1993) ISBN 0 7506 0737 8, £25, pp 155
363 -- 364David Milford. Programmable Logic Handbook (second edition): Geoff Bostock Butterworth-Heinemann, Oxford, UK (1993) ISBN 0 7506 0808 0, £19.95, pp 301

Volume 18, Issue 5

243 -- 251Ezequiel Ballesteros, Francisco Lorenzo, T. Viera, M. Reyes, J. A. Bonet. Electronic design of a solar correlation tracker based on a video motion estimation processor
253 -- 260V. Lakshmi Narasimhan, K. Wood, T. Downs. A four-channel communications arbiter for multiprocessor arrays
261 -- 269K. V. Subramaniam, Matthew J. Thazhuthaveetil. Design of an MS-DOS PC program profiler
271 -- 279Pavel Zemcík, Erik L. Dagless. Printing grey scale images on a fax machine
281 -- 290Giuseppe De Pietro, Umberto Villano. SYNC_WAVE: a high accuracy and low overhead algorithm for clock, synchronization in transputer networks
297 -- 0John Cooke. Symbolic Model Checking: Kenneth L McMillan, Kluwer Academic, Dordrecht, The Netherlands (1993) ISBN 0 7923 9380 5, £54.50, pp 194
298 -- 0David McCartney. 68000 Family Assembly Language: Alan Clements, PWS Publishing, Boston, USA (1994) ISBN 0 534 93275 4, £20.95, pp 720
298 -- 299Dieter Gollmann. Error Detecting Circuits: Michael Gössel and Steffen Graf, McGraw-Hill, Maidenhead, UK (1993) ISBN 0 07 707438 6, £35.00, pp 224
299 -- 0Padmanabhan Krishnan. Corrigendum

Volume 18, Issue 4

187 -- 192A. Sreenivas, K. N. Balasubramanya Murthy, C. Siva Ram Murthy. Reverse scheduling - an effective method for scheduling tasks of parallel programs employing a divide-and-conquer strategy onto multiprocessors
193 -- 203Gul N. Khan, Khalid Mahmud, M. Salman Igbal, Haroon-Ur-Rashid Khan. RSM - a restricted shared memory architecture for high speed interprocessor communication
205 -- 213A. A. Wardak, G. A. King, R. Backhouse. Interfacing high-level and assembly language with microcodes in 3-D image generation
215 -- 221Chris Swan, David M. Howard, Andrew M. Tyrrell. Real-time transputer simulation of the human peripheral hearing system
223 -- 230V. Lakshmi Narasimhan, A. C. Lewty. Distributed event-driven simulation of a novel dynamic dataflow multiprocessor system - PATTSY
231 -- 237Dan R. McCutchan, James W. Reilly. Pentium processor thermal design guidelines

Volume 18, Issue 3

123 -- 130Padmanabhan Krishnan. A case study in specifying and testing architectural features
131 -- 139John Lenell, Nader Bagherzadeh. A performance comparison of several superscalar processor models with a VLIW processor
141 -- 150K. Vijayakumar, Vinod Chandra. Transputer-based fault-tolerant and fail-safe node for dual ring distributed railway signalling systems
151 -- 163A. M. Mukherjee, Andrew M. Tyrrell. Investigating the effects of induced faults in transputer systems
165 -- 171Brian R. Kirk. Designing systems with objects, processes and modules
173 -- 177Tarlton Fleming. 3 V systems spur evolution of the RS-232 standard
179 -- 0Roger M. A. Peel. Transputer Hardware and System Design : Jeremy Hinton and Alan Pinder Prentice Hall International, Hemel Hempstead, UK (1993) ISBN 0 13 953001 0, £19.95. pp 286
180 -- 181Ferenc Vajda. Nineteenth Euromicro Conference : Barcelona, Spain, 6-9 September 1993

Volume 18, Issue 2

67 -- 78J. N. H. Heemskerk, Jaap Hoekstra, Jacob M. J. Murre, Leon H. J. G. Kemna, Patrick T. W. Hudson. The BSP400: a modular neurocomputer
79 -- 87Wei-Jou Duh, Ja-Ling Wu, Jau-Hsiung Huang. A multiprocessor system for visual communications using distributed transputer arrays
89 -- 94A. S. White, C. Kelly. Optimization of a control algorithm using a simulation package
95 -- 99Ivor Spence. Displaying digital images in a distributed processing environment
101 -- 108K. V. M. Deva Raju, S. V. Subba Rao, K. V. Srinivasan, K. Visvanathan. Multichannel real-time data acquisition system using dual ported FIFO buffers
109 -- 117David Wilson. 16-bit DSP servo control with the MC68HC16Z1

Volume 18, Issue 10

571 -- 578Jim E. Cooling. Task scheduling in hard real-time embedded systems using hardware co-processors
579 -- 591Matjaz Colnaric, Wolfgang A. Halang, Ronald M. Tol. A hardware supported operating system kernel for embedded hard real-time applications
593 -- 599Richard J. Mitchell, Martin Loomes, John Howse. Structuring formal specifications - a lesson relearned
601 -- 612K. M. R. Audenaert, Luk Levrouw. Interrupt replay: a debugging method for parallel programs with interrupts
613 -- 620Anupama Hegde. Error detection and correction with the IDT49C466
621 -- 622Marian Adamski. Structured Logic Design with VHDL : James R Armstrong and F Gail Gray Prentice Hall International, Englewood Cliffs, NJ, USA (1993) ISBN 0 13 855206 I, £43.25, pp 482
622 -- 0M. Moshgbar. Robot Learning : Edited by J H Connell and S Mahadevan Kluwer Academic, Dordrecht, The Netherlands (1993) ISBN 0 7923 9365 I, £65.75, Dfl.185.00, pp 256

Volume 18, Issue 1

3 -- 4M. J. P. Bolton. Editorial
5 -- 11George Kechriotis, Elias S. Manolakos. Training fully recurrent neural networks on a ring transputer array
12 -- 18Nick Tsakalos, Evangelos Zigouris. Use of a single chip fixed-point DSP for multiple speech channel vocoders
19 -- 26T. Hanif, Mark B. Sandler. A counter-based Hough transform system
27 -- 38P. A. Witting. A technique for the implementation of low frequency digital filters with simple FAD-based hardware
39 -- 47M. H. Er, T. H. Ooi, L. S. Li, C. J. Liew. A DSP-based acoustic feedback canceller for public address systems
48 -- 51Yong-In S. Shin. Live insertion considerations for Philips TTL bus-interface logic devices
52 -- 0Jim E. Cooling. Object-Oriented Interfacing to 16-bit Microcontrollers: G J Lipovski Prentice Hall, Hemel Hempstead, UK (1993) ISBN 0 13 629221 6, £33.95, pp 490
53 -- 0Chris R. Jesshope. Mechanized Reasoning and Hardware Design: C A R Hoare and M J C Gordon (Eds) Prentice Hall, Hemel Hempstead, UK (1992) ISBN 0 13 572405 8, £40, pp 151
54 -- 0Bill Postlethwaite. Assembly Language and Systems Programming for the M68000 Family (second edition): William Ford and William Topp D. C. Heath, Toronto, Canada (1992) ISBN 0 669 28199 9, $44 (UK £22.95 for educational establishments) pp 890 + 240 appendix
55 -- 0Simon Jones. Digital BiCMOS Integrated Circuit Design: Sherif H K Embabi, A. Bellaouar and Mohamed I Elmasry Kluwer Academic, Dordrecht, The Netherlands (1992) ISBN 0 7923 9276 0, £62.50, pp 432