Journal: IEEE Micro

Volume 32, Issue 6

4 -- 16Manish Arora, Siddhartha Nath, Subhra Mazumdar, Scott B. Baden, Dean M. Tullsen. Redefining the Role of the CPU in the Era of CPU-GPU Integration
17 -- 27Javier Verdú, Alex Pajuelo, Mateo Valero. The Problem of Evaluating CPU-GPU Systems with 3D Visualization Applications
28 -- 37David May. The XMOS Architecture and XS1 Chips
38 -- 50Jinwook Oh, Gyeonghoon Kim, Injoon Hong, Junyoung Park, Seungjin Lee, Joo-Young Kim, Jeong-Ho Woo, Hoi-Jun Yoo. Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems
52 -- 61Kazutoshi Suito, Rikuhei Ueda, Kei Fujii, Takuma Kogo, Hiroki Matsutani, Nobuyuki Yamasaki. The Dependable Responsive Multithreaded Processor for Distributed Real-Time Systems

Volume 32, Issue 5

2 -- 0Erik R. Altman. Power- and Energy-Aware Computing
4 -- 5Josep Torrellas. 2012 International Symposium on Computer Architecture Influential Paper Award
6 -- 8Thomas F. Wenisch, Alper Buyuktosunoglu. Energy-Aware Computing
10 -- 24Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene. Ultra Low-Energy SRAM Design for Smart Ubiquitous Sensors
26 -- 36David Burgess, Edmund Gieske, James Holt, Thomas Hoy, Gary Whisenhunt. e6500: Freescale's Low-Power, High-Performance Multithreaded Embedded Processor
38 -- 51Venkatraman Govindaraju, Chen-Han Ho, Tony Nowatzki, Jatin Chhugani, Nadathur Satish, Karthikeyan Sankaralingam, Changkyu Kim. DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing
52 -- 63Boris Grot, Damien Hardy, Pejman Lotfi-Kamran, Babak Falsafi, Chrysostomos Nicopoulos, Yiannakis Sazeides. Optimizing Data-Center TCO with Scale-Out Processors
64 -- 75Sherief Reda, Ryan Cochran, Ayse Kivilcim Coskun. Adaptive Power Capping for Servers with Multithreaded Workloads
76 -- 77Richard Mateosian. Forewords by Celebrities
80 -- 0Shane Greenstein. The Prevailing View

Volume 32, Issue 4

2 -- 0Erik R. Altman. The Odd Couple: Hardware and Software
3 -- 5Doug Burger, Stephen W. Keckler, Mark Papermaster. Charles R. (Chuck) Moore (1961 - 2012)
6 -- 7David I. August. Parallelizing Sequential Code
8 -- 18Simone Campanoni, Timothy M. Jones, Glenn H. Holloway, Gu-Yeon Wei, David M. Brooks. Helix: Making the Extraction of Thread-Level Parallelism Mainstream
19 -- 31Feng Li, Antoniu Pop, Albert Cohen. Automatic Extraction of Coarse-Grained Data-Flow Threads from Imperative Programs
32 -- 41Md Kamruzzaman, Steven Swanson, Dean M. Tullsen. Underclocked Software Prefetching: More Cores, Less Energy
42 -- 53Saturnino Garcia, Donghwan Jeon, Christopher M. Louie, Michael Bedford Taylor. The Kremlin Oracle for Sequential Code Parallelization
54 -- 67Hengjie Li, Wenting He, Yang Chen, Lieven Eeckhout, Olivier Temam, Chengyong Wu. SWAP: Parallelization through Algorithm Substitution
68 -- 69Rich Belgard. Yale N. Patt Receives the Inaugural IEEE B. Ramakrishna Rau Award
72 -- 0Shane Greenstein. Calm Economics

Volume 32, Issue 3

2 -- 0Erik R. Altman. Top Picks, Columnists, and Artists
3 -- 6Paolo Faraboschi, T. N. Vijaykumar. Top Picks from the 2011 Computer Architecture Conferences
7 -- 16Wilson Wai Lun Fung, Inderpreet Singh, Andrew Brownsword, Tor M. Aamodt. Kilo TM: Hardware Transactional Memory for GPU Architectures
17 -- 25Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu. A QoS-Enabled On-Die Interconnect Fabric for Kilo-Node Chips
26 -- 37Daniel Sanchez, Christos Kozyrakis. Scalable and Efficient Fine-Grained Cache Partitioning with Vantage
38 -- 47Hung-Wei Tseng, Dean M. Tullsen. Eliminating Redundant Computation and Exposing Parallelism through Data-Triggered Threads
48 -- 59Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay A. Shah, Hiran Mayukh, Jayneel Gandhi, Brandon H. Dwiel, Sandeep Navada, Hashem Hashemi Najaf-abadi, Eric Rotenberg. FabScalar: Automating Superscalar Core Design
60 -- 69Qingyuan Deng, Luiz E. Ramos, Ricardo Bianchini, David Meisner, Thomas F. Wenisch. Active Low-Power Modes for Main Memory with MemScale
70 -- 78Gabriel H. Loh, Mark D. Hill. Supporting Very Large DRAM Caches with Compound-Access Scheduling and MissMap
79 -- 87Doe Hyun Yoon, Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganathan, Norman P. Jouppi, Mattan Erez. Free-p: A Practical End-to-End Nonvolatile Memory Protection Mechanism
88 -- 99Jason Mars, Lingjia Tang, Kevin Skadron, Mary Lou Soffa, Robert Hundt. Increasing Utilization in Modern Warehouse-Scale Computers Using Bubble-Up
100 -- 109Nathan L. Binkert, Al Davis, Norman P. Jouppi, Moray McLaren, Naveen Muralimanohar, Robert Schreiber, Jung Ho Ahn. Optical High Radix Switch Design
110 -- 121Hadi Esmaeilzadeh, Ting Cao, Xi Yang, Stephen Blackburn, Kathryn S. McKinley. What is Happening to Power, Performance, and Software?
122 -- 134Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger. Dark Silicon and the End of Multicore Scaling
136 -- 141Michael C. Doggett. Texture Caches
142 -- 143Shane Greenstein. The Secret Life of Wally Madhavani

Volume 32, Issue 2

2 -- 0Erik R. Altman. Micro Evolution
3 -- 5Richard H. Stern. Standardization Skullduggery Never Ends: Apple v. Motorola
6 -- 7Allen Baum, Bevan Bass. Hot Chips 23
8 -- 19Manish Shah, Robert T. Golla, Greg Grohoski, Paul J. Jordan, Jama Barreh, Jeffrey Brooks, Mark Greenberg, Gideon Levinsky, Mark Luttrell, Christopher Olson, Zeid Samoail, Matt Smittle, Thomas A. Ziaja. Sparc T4: A Dynamically Threaded Server-on-a-Chip
20 -- 27Efraim Rotem, Alon Naveh, Avinash Ananthakrishnan, Eliezer Weissmann, Doron Rajwan. Power-Management Architecture of the Intel Microarchitecture Code-Named Sandy Bridge
28 -- 37Alexander Branover, Denis Foley, Maurice Steinman. AMD Fusion APU: Llano
38 -- 47Dongrui Fan, Hao Zhang, Da Wang, Xiaochun Ye, Fenglong Song, Guojie Li, Ninghui Sun. Godson-T: An Efficient Many-Core Processor Exploring Thread-Level Parallelism
48 -- 60Ruud A. Haring, Martin Ohmacht, Thomas Fox, Michael Gschwind, David L. Satterfield, Krishnan Sugavanam, Paul Coteus, Philip Heidelberger, Matthias A. Blumrich, Robert W. Wisniewski, Alan Gara, George L.-T. Chiu, Peter A. Boyle, Norman H. Christ, Changhoan Kim. The IBM Blue Gene/Q Compute Chip
61 -- 63Richard Mateosian. Miscellany
64 -- 0Shane Greenstein. A Big Payoff

Volume 32, Issue 1

2 -- 3Erik R. Altman. Hot Interconnects and Hot Topics
4 -- 7Torsten Hoefler, Patrick Geoffray, Fabrizio Petrini, Jesper Larsson Träff. Top Picks from Hot Interconnects 2011: Petascale Network Architectures
8 -- 20Min Xie, Yutong Lu, Kefei Wang, Lu Liu, HongJia Cao, Xuejun Yang. Tianhe-1A Interconnect and Message-Passing Services
21 -- 31Yuichiro Ajima, Tomohiro Inoue, Shinya Hiramoto, Yuzo Takagi, Toshiyuki Shimizu. The Tofu Interconnect
32 -- 43Dong Chen, Noel Eisley, Philip Heidelberger, Robert M. Senger, Yutaka Sugawara, Sameer Kumar 0001, Valentina Salapura, David L. Satterfield, Burkhard D. Steinmacher-Burow, Jeffrey J. Parker. The IBM Blue Gene/Q Interconnection Fabric
44 -- 53Ismael Gómez Miguelez, Vuk Marojevic, Antoni Gelonch Bosch. Resource Management for Software-Defined Radio Clouds
54 -- 65Fabrice Harrouet. Designing a Multicore and Multiprocessor Individual-Based Simulation Engine
66 -- 70Parthasarathy Ranganathan, Jichuan Chang. (Re)Designing Data-Centric Data Centers
72 -- 0Shane Greenstein. The Range of Linus' Law