| 1 | -- | 2 | Francesc Esteva, Joan Gispert, Felip Manyà. Introduction to the Special Issue of the IEEE 40th International Symposium on Multiple-Valued Logic |
| 3 | -- | 23 | Josep Argelich, Alba Cabiscol, Inês Lynce, Felip Manyà. Efficient Encodings from CSP into SAT, and from MaxCSP into MaxSAT |
| 25 | -- | 39 | Félix Bou. Infinite-valued Lukasiewicz Logic Based on Principal Lattice Filters |
| 41 | -- | 50 | Manuela Busaniche, Leonardo Manuel Cabrer. Completions in Subvarieties of BL-algebras |
| 51 | -- | 70 | Carlos Caleiro, João Marcos 0001. Many-valuedness Meets Bivalence: Using Logical Values in an EffectiveWay |
| 71 | -- | 84 | Pietro Codara, Ottavio M. D'Antona, Vincenzo Marra. Valuations in Gödel Logic, and the Euler Characteristic |
| 85 | -- | 94 | Miguel Couceiro, Lucien Haddad. Intersections of Finitely Generated Maximal Partial Clones |
| 95 | -- | 108 | Pilar Dellunde. Revisiting Ultraproducts in Fuzzy Predicate Logics |
| 109 | -- | 131 | Elena Dubrova, Ming Liu, Maxim Teslenko. Finding Attractors in Synchronous Multiple-Valued Networks Using SAT-based Bounded Model Checking |
| 133 | -- | 147 | Hadi Hosseini, Gerhard W. Dueck. Toffoli Gate Implementation Using The Billiard Ball Model |
| 149 | -- | 162 | Hajime Machida, Jovanka Pantovic, Ivo G. Rosenberg. Regular Sets of Operations |
| 163 | -- | 183 | João Marques-Silva. Computing Minimally Unsatisfiable Subformulas: State of the Art and Future Directions |
| 185 | -- | 201 | D. Michael Miller, Robert Wille, Rolf Drechsler. Reducing Reversible Circuit Cost by Adding Lines |
| 203 | -- | 217 | Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura. A Comparison of Multi-Valued and Heterogeneous Decision Diagram Machines |
| 219 | -- | 231 | Masanori Natsui, Takashi Arimitsu, Takahiro Hanyu. Low-Energy Pipelined Multiple-Valued Current-Mode Circuit Based on Current-Level Control Technique |
| 233 | -- | 250 | Dan A. Simovici, Dan Pletea, Rosanne Vetro. Learning Determining Sets of Finite Partially Defined Functions |
| 251 | -- | 269 | Radomir S. Stankovic, Jaakko Astola, Claudio Moraga. Design of Multiple-Valued Logic Networks with Regular Structure by Using Spectral Representations |
| 271 | -- | 282 | Yasushi Yuminaka, Kyohei Kawano. A Bandwidth-Efficient Ternary Signaling Scheme for 1-D Partial-Response Channels |