| 583 | -- | 585 | José E. Schutt-Ainé, Sung-Mo Kang. Scanning the issue interconnections - addressing the next challenge of IC technology (part II: design, characterization, and modeling) |
| 586 | -- | 601 | Robert H. Havemann, James A. Hutchby. High-performance interconnects: an integration overview |
| 602 | -- | 633 | Kaustav Banerjee, Shukri J. Souri, Pawan Kapur, Krishna C. Saraswat. 3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration |
| 634 | -- | 664 | Dennis Sylvester, Chenming Wu. Analytical modeling and characterization of deep-submicrometer interconnect |
| 665 | -- | 692 | Eby G. Friedman. Clock distribution networks in synchronous digital integrated circuits |
| 693 | -- | 728 | Ramachandra Achar, Michel S. Nakhla. Simulation of high-speed interconnects |
| 729 | -- | 739 | William H. Kao, Chi-Yuan Lo, Mark Basel, Raminderpal Singh. Parasitic extraction: current state of the art and future trends |
| 740 | -- | 771 | Albert E. Ruehli, Andreas C. Cangellaris. Progress in the methodologies for the electrical modeling of interconnects and electronic packages |
| 772 | -- | 788 | Qingjian Yu, Ernest S. Kuh. Moment computation of lumped and distributed coupled RC trees with application to delay and crosstalk estimation |
| 789 | -- | 0 | Thomas J. Shaffner. Correction to "semiconductor characterization and analytical technology" |
| 790 | -- | 792 | Brian Bowers. Scanning our past from London: Galileo Ferraris and alternating current |