| 1 | -- | 0 | Norman P. Jouppi, Rakesh Kumar, Dean M. Tullsen. Introduction to the special issue on the 2008 workshop on design, analysis, and simulation of chip multiprocessors (dasCMP 08) |
| 2 | -- | 9 | Hui Zeng, Matt T. Yourst, Kanad Ghose, Dmitry Ponomarev. MPTLsim: a cycle-accurate, full-system simulator for x86-64 multicore architectures with coherent caches |
| 10 | -- | 19 | Matteo Monchiero, Jung Ho Ahn, Ayose Falcón, Daniel Ortega, Paolo Faraboschi. How to simulate 1000 cores |
| 20 | -- | 29 | Jianwei Chen, Murali Annavaram, Michel Dubois. SlackSim: a platform for parallel simulations of CMPs on CMPs |
| 30 | -- | 37 | Madhura Purnaprajna, Mario Porrmann, Ulrich Rückert. Run-time reconfigurability in embedded multiprocessors |
| 38 | -- | 45 | Chris R. Jesshope, Mike Lankamp, Li Zhang. The implementation of an SVP many-core processor and the evaluation of its memory architecture |
| 46 | -- | 55 | Karan Singh, Major Bhadauria, Sally A. McKee. Real time power estimation and thread scheduling via performance counters |
| 56 | -- | 65 | Omid Azizi, Aqeel Mahesri, Sanjay J. Patel, Mark Horowitz. Area-efficiency in CMP core design: co-optimization of microarchitecture and physical design |
| 66 | -- | 69 | Mark Thorson. Internet nuggets |