Journal: SIGARCH Computer Architecture News

Volume 38, Issue 5

1 -- 6Manideepa Mukherjee, Amitabha Sinha. A novel architecture for conversion of binary to single digit double base numbers
7 -- 11Shobha T, Syed Akram, G. Varaprasad. Design and development of framework for diagnosing intermediate nodes
12 -- 19Fuad Tabba. Adding concurrency in python using a commercial processor s hardware transactional memory support
20 -- 27Alexander Thomasian. Why specialized disks for composite operations may be unnecessary
28 -- 36Mark Thorson. Internet nuggets

Volume 38, Issue 4

2 -- 7Marco Aurelio Nuño-Maganda, Cesar Torres-Huitzil. A temporal coding hardware implementation for spiking neural networks
8 -- 13Hirokazu Morishita, Kenta Inakagata, Yasunori Osana, Naoyuki Fujita, Hideharu Amano. Implementation and evaluation of an arithmetic pipeline on FLOPS-2D: multi-FPGA system
14 -- 20Anson H. T. Tse, David B. Thomas, Kuen Hung Tsoi, Wayne Luk. Efficient reconfigurable design for pricing asian options
21 -- 26Tadayoshi Horita, Itsuo Takanami. An FPGA-based fast classifier with high generalization property
27 -- 32Andrew Putnam, Aaron Smith, Doug Burger. Dynamic vectorization in the E2 dynamic multicore architecture
33 -- 39Jong Kyung Paek, Kiyoung Choi, Jong-eun Lee. Binary acceleration using coarse-grained reconfigurable architecture
40 -- 45Keisuke Dohi, Yuichiro Shibata, Tsuyoshi Hamada, Tomonari Masada, Kiyoshi Oguri, Duncan A. Buell. Implementation of a programming environment with a multithread model for reconfigurable systems
46 -- 52Mojtaba Sabeghi, Hamid Mushtaq, Koen Bertels. Runtime multitasking support on polymorphic platforms
53 -- 59Kuen Hung Tsoi, Anson H. T. Tse, Peter Pietzuch, Wayne Luk. Programming framework for clusters with heterogeneous accelerators
60 -- 65Claude Tadonki, Gilbert Grodidier, Olivier Pène. An efficient CELL library for lattice quantum chromodynamics
66 -- 72Ryan Taylor, Xiaoming Li. Software-based branch predication for AMD GPUs
73 -- 79Sebastian Banescu, Florent de Dinechin, Bogdan Pasca, Radu Tudoran. Multipliers for floating-point double precision and beyond on FPGAs
80 -- 86Kentaro Sano, Luzhou Wang, Satoru Yamamoto. Prototype implementation of array-processor extensible over multiple FPGAs for scalable stencil computation
87 -- 92Chi Chiu Tsang, Hayden Kwok-Hay So. Dynamic power reduction of FPGA-based reconfigurable computers using precomputation
93 -- 96Mark Thorson. Internet nuggets

Volume 38, Issue 2

1 -- 48Alexander Thomasian. Storage research in industry and universities
49 -- 63Wolfgang Matthes. Resources instead of cores?
64 -- 67Mark Thorson. Internet nuggets