Journal: TACO

Volume 14, Issue 4

0 -- 0Ramyad Hadidi, Lifeng Nai, Hyojong Kim, Hyesoon Kim. CAIRO: A Compiler-Assisted Technique for Enabling Instruction-Level Offloading of Processing-In-Memory
0 -- 0Christina Peterson, Damian Dechev. A Transactional Correctness Tool for Abstract Data Types
0 -- 0Hongyeol Lim, Giho Park. Triple Engine Processor (TEP): A Heterogeneous Near-Memory Processor for Diverse Kernel Operations
0 -- 0George Patsilaras, James Tuck. ReDirect: Reconfigurable Directories for Multicore Architectures
0 -- 0Daniele De Sensi, Tiziano De Matteis, Massimo Torquati, Gabriele Mencagli, Marco Danelutto. 3 ARSEC Benchmark Suite
0 -- 0Libo Huang, Ya-shuai Lü, Li Shen, Zhiying Wang. Improving the Efficiency of GPGPU Work-Queue Through Data Awareness
0 -- 0Adarsh Patil, Ramaswamy Govindarajan. HAShCache: Heterogeneity-Aware Shared DRAMCache for Integrated Heterogeneous Systems
0 -- 0Matteo Ferroni, Andrea Corna, Andrea Damiani, Rolando Brondolin, Juan A. Colmenares, Steven A. Hofmeyr, John Kubiatowicz, Marco D. Santambrogio. Power Consumption Models for Multi-Tenant Server Infrastructures
0 -- 0Milad Mohammadi, Tor M. Aamodt, William J. Dally. CG-OoO: Energy-Efficient Coarse-Grain Out-of-Order Execution Near In-Order Energy with Near Out-of-Order Performance
0 -- 0Somayeh Sardashti, David A. Wood. Could Compression Be of General Use? Evaluating Memory Compression across Domains
0 -- 0Chencheng Ye, Chen Ding, Hao Luo, Jacob Brock, Dong Chen, Hai Jin. Cache Exclusivity and Sharing: Theory and Optimization
0 -- 0Christophe Alias, Alexandru Plesco. Optimizing Affine Control With Semantic Factorizations
0 -- 0Rahul Jain 0004, Preeti Ranjan Panda, Sreenivas Subramoney. Cooperative Multi-Agent Reinforcement Learning-Based Co-optimization of Cores, Caches, and On-chip Network
0 -- 0Kanakagiri Raghavendra, Biswabandan Panda, Madhu Mutyam. MBZip: Multiblock Data Compression
0 -- 0Julien Proy, Karine Heydemann, Alexandre Berzati, Albert Cohen 0001. Compiler-Assisted Loop Hardening Against Fault Attacks
0 -- 0Toufik Baroudi, Rachid Seghir, Vincent Loechner. Optimization of Triangular and Banded Matrix Operations Using 2d-Packed Layouts
0 -- 0Jaime Arteaga, Stéphane Zuckerman, Guang R. Gao. Generating Fine-Grain Multithreaded Applications Using a Multigrain Approach
0 -- 0Giorgis Georgakoudis, Hans Vandierendonck, Peter Thoman, Bronis R. de Supinski, Thomas Fahringer, Dimitrios S. Nikolopoulos. SCALO: Scalability-Aware Parallelism Orchestration for Multi-Threaded Workloads
0 -- 0Alexandra Angerd, Erik Sintorn, Per Stenström. A Framework for Automated and Controlled Floating-Point Accuracy Reduction in Graphics Applications on GPUs
0 -- 0Richard Neill, Andi Drebes, Antoniu Pop. Fuse: Accurate Multiplexing of Hardware Performance Counters Across Executions
0 -- 0Muhammad Waqar Azhar, Per Stenström, Vassilis Papaefstathiou. SLOOP: QoS-Supervised Loop Execution to Reduce Energy on Heterogeneous Architectures
0 -- 0Rahul Shrivastava, V. Krishna Nandivada. Energy-Efficient Compilation of Irregular Task-Parallel Loops
0 -- 0Shivam Swami, Poovaiah M. Palangappa, Kartik Mohanram. ECS: Error-Correcting Strings for Lifetime Improvements in Nonvolatile Memories
0 -- 0George Matheou, Paraskevas Evripidou. Data-Driven Concurrency for High Performance Computing

Volume 14, Issue 3

0 -- 0Andreas Diavastos, Pedro Trancoso. SWITCHES: A Lightweight Runtime for Dataflow Execution of Tasks on Many-Cores
0 -- 0Amir Hossein Ashouri, Andrea Bignoli, Gianluca Palermo, Cristina Silvano, Sameer Kulkarni, John Cavazos. MiCOMP: Mitigating the Compiler Phase-Ordering Problem Using Optimization Sub-Sequences and Machine Learning
0 -- 0Ayman Hroub, Muhammad E. S. Elrabaa, M. F. Mudawar, A. Khayyat. Efficient Generation of Compact Execution Traces for Multicore Architectural Simulations
0 -- 0Dongliang Xiong, Kai Huang 0002, Xiaowen Jiang, Xiaolang Yan. Providing Predictable Performance via a Slowdown Estimation Model
0 -- 0Sander Vocke, Henk Corporaal, Roel Jordans, Rosilde Corvino, Rick J. M. Nas. Extending Halide to Improve Software Development for Imaging DSPs
0 -- 0Jing Pu, Steven Bell, Xuan Yang, Jeff Setter, Stephen Richardson, Jonathan Ragan-Kelley, Mark Horowitz. Programming Heterogeneous Systems from an Image Processing DSL
0 -- 0Nicklas Bo Jensen, Sven Karlsson. Improving Loop Dependence Analysis
0 -- 0Stefan Ganser, Armin Größlinger, Norbert Siegmund, Sven Apel, Christian Lengauer. Iterative Schedule Optimization for Parallelization in the Polyhedron Model
0 -- 0Nicolas Weber, Michael Goesele. MATOG: Array Layout Auto-Tuning for CUDA
0 -- 0Wei Wei, Dejun Jiang, Jin Xiong, Mingyu Chen. HAP: Hybrid-Memory-Aware Partition in Shared Last-Level Cache
0 -- 0Erik Vermij, Leandro Fiorin, Rik Jongerius, Christoph Hagleitner, Jan van Lunteren, Koen Bertels. An Architecture for Integrated Near-Data Processors

Volume 14, Issue 2

0 -- 0Aswinkumar Sridharan, Biswabandan Panda, André Seznec. Band-Pass Prefetching: An Effective Prefetch Management Mechanism Using Prefetch-Fraction Metric in Multi-Core Systems
0 -- 0Dongwoo Lee, Sangheon Lee, Soojung Ryu, Kiyoung Choi. Dirty-Block Tracking in a Direct-Mapped DRAM Cache with Self-Balancing Dispatch
0 -- 0Gleison Souza Diniz Mendonca, Breno Campos Ferreira Guimaraes, Péricles Alves, Marcio Machado Pereira, Guido Araujo, Fernando Magno Quintão Pereira. DawnCC: Automatic Annotation for Data Parallelism and Offloading
0 -- 0Rajeev Balasubramonian, Andrew B. Kahng, Naveen Muralimanohar, Ali Shafiee, Vaishnav Srinivas. CACTI 7: New Tools for Interconnect Exploration in Innovative Off-Chip Memories
0 -- 0Andrés Goens, Sergio Siccha, Jerónimo Castrillón. Symmetry in Software Synthesis
0 -- 0Milan Stanic, Oscar Palomar, Timothy Hayes 0001, Ivan Ratkovic, Adrián Cristal, Osman S. Unsal, Mateo Valero. An Integrated Vector-Scalar Design on an In-Order ARM Core
0 -- 0Tae Jun Ham, Juan L. Aragón, Margaret Martonosi. Decoupling Data Supply from Computation for Latency-Tolerant Communication in Heterogeneous Architectures
0 -- 0Vishwesh Jatala, Jayvant Anantpur, Amey Karkare. Scratchpad Sharing in GPUs
0 -- 0Konstantinos Parasyris, Vassilis Vassiliadis, Christos D. Antonopoulos, Spyros Lalis, Nikolaos Bellas. Significance-Aware Program Execution on Unreliable Hardware
0 -- 0Fernando A. Endo, Arthur Perais, André Seznec. On the Interactions Between Value Prediction and Compiler Optimizations in the Context of EOLE

Volume 14, Issue 1

0 -- 0Wenguang Zheng, Hui Wu, Qing Yang. WCET-Aware Dynamic I-Cache Locking for a Single Task
0 -- 0Mainak Chaudhuri, Mukesh Agrawal, Jayesh Gaur, Sreenivas Subramoney. Micro-Sector Cache: Improving Space Utilization in Sectored DRAM Caches
0 -- 0Darko Zivanovic, Milan Pavlovic, Milan Radulovic, Hyunsung Shin, Jongpil Son, Sally A. McKee, Paul M. Carpenter, Petar Radojkovic, Eduard Ayguadé. Main Memory in HPC: Do We Need More or Could We Live with Less?
0 -- 0Byung-Sun Yang, Jae Yun Kim, Soo-Mook Moon. Exceptionization: A Java VM Optimization for Non-Java Languages
0 -- 0Rathijit Sen, David A. Wood. Pareto Governors for Energy-Optimal Computing
0 -- 0Poovaiah M. Palangappa, Kartik Mohanram. CompEx++: Compression-Expansion Coding for Energy, Latency, and Lifetime Improvements in MLC/TLC NVMs
0 -- 0Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel. Defragmentation of Tasks in Many-Core Architecture
0 -- 0Kyriakos Georgiou, Steve Kerrison, Zbigniew Chamski, Kerstin Eder. Energy Transparency for Deeply Embedded Programs
0 -- 0Lev Mukhanov, Pavlos Petoumenos, Zheng Wang 0001, Konstantinos Parasyris, Dimitrios S. Nikolopoulos, Bronis R. de Supinski, Hugh Leather. ALEA: A Fine-Grained Energy Profiling Tool
0 -- 0Pengcheng Li, Xiaoyu Hu, Dong Chen, Jacob Brock, Hao Luo, Eddy Z. Zhang, Chen Ding. LD: Low-Overhead GPU Race Detection Without Access Monitoring