| 385 | -- | 395 | Theodora A. Varvarigou, Vwani P. Roychowdhury, Thomas Kailath. A Polynomial Time Algorithm for Reconfiguring Multiple-Track Models |
| 396 | -- | 412 | Chris H. Perleberg, Alan Jay Smith. Branch Target Buffer Design and Optimization |
| 413 | -- | 426 | Marcel Lapointe, Huu Tue Huynh, Paul Fortier. Systematic Design of Pipelined Recursive Filters |
| 427 | -- | 432 | Elio D. Di Claudio, Gianni Orlandi, Francesco Piazza. A Systolic Redundant Residue Arithmetic Error Correction Circuit |
| 433 | -- | 446 | G. Robert Redinbo, Leonard M. Napolitano Jr., David D. Andaleon. Multibit Correcting Data Interface for Fault-Tolerant Systems |
| 447 | -- | 457 | Nageswara S. V. Rao. Computational Complexity Issues in Operative Diagnosis of Graph-Based Systems |
| 458 | -- | 470 | . Design and Analysis of Cache Coherent Multistage Interconnection Networks |
| 471 | -- | 483 | Ram Raghavan, John P. Hayes. Reducing Inerference Among Vector Accesses in Interleaved Memories |
| 484 | -- | 493 | Shambhu J. Upadhyaya, Hoang Pham. Analysis of Noncoherent Systems and an Architecture for the Computation of the System Reliability |
| 494 | -- | 497 | Benjamin Arazi. Architectures for Exponentiation Over GF(2^n) Adopted for Smartcard Application |
| 497 | -- | 501 | Nobuo Funabiki, Yoshiyasu Takefuji, Kuo Chun Lee. Comparisons of Seven Neural Network Models on Traffic Control Problems in Multistage Interconnection Networks |
| 501 | -- | 507 | Shyi-Chyi Cheng, Wen-Hsiang Tsai. A Neural Network Implementation of the Moment-Preserving Technique and Its Application to Thresholding |
| 508 | -- | 512 | Jacob van den Berg, Donald F. Towsley. Properties of the Miss Ratio for a 2-Level Storage Model with LRU or FIFO Replacement Strategy and Independent References |