Journal: IEEE Transactions on Computers

Volume 14, Issue 6

769 -- 781Rocco H. Urbano. Some New Results on the Convergence, Oscillation, and Reliability of Polyfunctional Nets
781 -- 786Juris Hartmanis. Two Tests for the Linearity of Sequential Machines
786 -- 791Florin S. Stanciulescu. Sequential Logic and its Application to the Synthesis of Finite Automata
791 -- 797Franco P. Preparata. On the Realizability of Special Classes of Autonomous Sequential Networks
798 -- 814Ching Lai Sheng. Compound Synthesis of Threshold-Logic Network for the Realization of General Boolean Functions
815 -- 822Michael Yoeli. A Group-Theoretical Approach to Two-Rail Cascades
822 -- 829Frank M. Brown. Code Transformation in Sequential Machines
830 -- 840Angelo R. Meo. On the Determination of the ps Maximal Implicants of a Switching Function
841 -- 851Ronald E. Prather. On Tree Circuits
852 -- 862Harold S. Stone, A. J. Korenjak. Canonical Form and Synthesis of Cellular Cascades
863 -- 867M. Combet, H. Van Zonneveld, L. Verbeek. Computation of the Base Two Logarithm of Binary Numbers
868 -- 874Donald L. Dietmeyer, Peter R. Schneider. A Computer-Oriented Factoring Algorithm for NOR Logic Design
875 -- 880Frank C. Yao. Interconnection and Noise Immunity of Circuitry in Digital Computers
881 -- 886George W. Taylor. Utilization of the t* Partial Switching Properties of Ferroelectrics in Memory Devices
886 -- 889S. P. Bingulac, Emir A. Humo. Analog Computer Generation of Bessel Functions of Arbitrary Order
890 -- 897R. Tomovic, N. S. Parezanovic, M. J. Merritt. Sensitivity of Dynamic Systems to Parameters Which Increase the Order of Mathematical Models
898 -- 908Arthur Hausner. Analog Computer Techniques for Problems in Complex Variables
909 -- 919Walter W. Wierwille. A Theory and Method for Correlation Analysis of Nonstationary Signals
920 -- 923S. R. Das, A. K. Choudhury. Maxterm Type Expressions of Switching Functions and Their Prime Implicants
924 -- 926Ching Lai Sheng. Detection of Totally Symmetric Boolean Functions
926 -- 929Shuzo Yajima, Toshihide Ibaraki. A Lower Bound of the Number of Threshold Functions
929 -- 931Sergiu Rudeanu. On Tohma's Decompositions of Logical Functions
931 -- 932Kenneth E. Batcher. On the Number of Stable States in a NOR Network
932 -- 934Zvi Kohavi. Reduction of Output Dependency in Sequential Machines
935 -- 936C. E. Kiessling, Cyril J. Tunis. Linearly Separable Codes for Adaptive Threshold Networks
936 -- 941Paul E. Wood Jr.. Digital Differential Analyzers with Arbitrary Stored Interconnections
941 -- 943Fred W. Smith. Coding Analog Variables for Threshold Logic Discrimination
944 -- 946P. Spiegel, R. L. Luce. A Nanosecond Monolithic TTL Gate
946 -- 950Harry R. Eckes. A Fast Mode-Control Switch for Iterative Differential Analyzers
950 -- 952Melvin A. Breuer. Implementation of Threshold Nets by Integer Linear Programming
952 -- 954F. L. Wang. An Isomorphic Notation of Switching Circuits
954 -- 957Iwao Toda. The Tree Set of a Linear Machine
957 -- 959Pierre Lavallée. Nonstable Cycle and Level Sets for Linear Sequential Machines
959 -- 961Pierre Lavallée. Some New Group Theoretic Properties of Singular Linear Sequential Machines
961 -- 963Jack Sklansky, A. J. Korenjak, H. S. Stone. Canonical Tributary Networks
963 -- 965Lucio Tavernini. The Automatic Sequencing of Block-Operators in the Digital Simulation of Analog and Analog-Hybrid Computers

Volume 14, Issue 5

683 -- 688Y. C. Ho, R. L. Kashyap. An Algorithm for Linear Inequalities and its Applications
688 -- 700A. J. Nichols. Minimal Shift-Register Realizations of Sequential Machines
701 -- 705D. T. Ellis. A Synthesis of Combinational Logic with NAND or NOR Elements
706 -- 711Herbert Y. Chang. An Algorithm for Selecting an Optimum Set of Diagnostic Tests
711 -- 717Karyl J. Gurzi. Estimates for Best Placement of Voters in a Triplicated Logic Network
717 -- 719Robert H. Whigham. A Fast Analog Comparison for Hybrid Computation
720 -- 721Karl S. Menger. Characterization and Cardinality of Universal Functions
721 -- 723L. M. Maxwell, E. E. Olander. A Method of Determining the Number of Vertices Contained in the SC Network Corresponding to a Given SC Transmission Function
724 -- 727C. V. Ramamoorthy. Connectivity Considerations of Graphs Representing Discrete Sequential Systems
727 -- 729Barrett Hazeltine. Encoding of Asynchronous Sequential Circuits
729 -- 730F. R. Frola. A Note on the Problem of Classifying Vertices of the n Cube into m Categories
730 -- 733V. Varshavsky, B. Ovsievich. Networks Composed of Ternary Majority Elements
733 -- 737I. Brcic. "Ideally Fast" Decimal Counters with Bistables
737 -- 740Karl Steinbuch, Bernard Widrow. A Critical Comparison of Two Kinds of Adaptive Classification Networks
740 -- 741Peter Fellgett. Logical Design of Analog-to-Digital Converters

Volume 14, Issue 4

535 -- 541James F. Gimpel. A Reduction Technique for Prime Implicant Tables
542 -- 552Franco Mileto, Gianfranco R. Putzolu. Average Values of Quantities Appearing in Multiple Output Boolean Minimization
552 -- 560John E. Hopcroft, R. L. Mattson. Synthesis of Minimal Threshold Logic Networks
561 -- 569Shimon Even. On Information Lossless Automata of Finite Order
570 -- 574T. C. Bartee, D. J. Chapman. Design of an Accumulator for a General Purpose Computer
575 -- 582D. W. Fife, J. L. Smith. Transmission Capacity of Disk Storage Systems with Concurrent Arm Positioning
583 -- 590Harold K. Knudsen. The Scaling of Digital Differential Analyzers
590 -- 599W. Bongenaar, N. C. de Troye. Worst-Case Considerations in Designing Logical Circuits
600 -- 605Yaohan Chu. A Destructive-Readout Associative Memory
606 -- 617Guillermo Gonzalez. Delay Approximations for Correlation Measurements Using Analog Computers
617 -- 623Walter W. Wierwille. Experimental Study of a New Method of Time Delay for Analog Computers
623 -- 625Irving J. Gabelman. An Algorithm for Threshold Element Analysis
625 -- 627Ming-Tsan Liu. On the Dual-Monotonicity of Threshold Functions
627 -- 629Rocco H. Urbano. Matrix Criteria for Arbitrary Reliability in Iterated Neural Nets
630 -- 634Janusz A. Brzozowski. Some Problems in Relay Circuit Design
634 -- 637Shimon Even. Comments on the Minimization of Stochastic Machines
637 -- 639Gordon A. Rose. "Light-Pen"' Facilities for Direct View Storage Tubes-An Economical Solution for Multiple Man-Machine Communication
639 -- 643A. R. Martin, Allen B. Rosenstein. A Shiftrix for High-Speed Multiplication
643 -- 646Otakar A. Horna. Figure of Merit of Electronic Switching Devices
646 -- 647H. Mott, C. C. Carroll. A Functional Counter
648 -- 0George L. Powers. Comment on NOR-NAND Synthesis

Volume 14, Issue 3

315 -- 325Robert O. Winder. Enumeration of Seven-Argument Threshold Functions
326 -- 334Thomas M. Cover. Geometrical and Statistical Properties of Systems of Linear Inequalities with Applications in Pattern Recognition
335 -- 342D. M. Y. Chang, Thomas H. Mott Jr.. Computing Irredundant Normal Forms from Abbreviated Presence Functions
343 -- 349A. J. Nichols, A. J. Bernstein. State Assignments in Combinational Networks
350 -- 359Antonio Grasselli, Fabrizio Luccio. A Method for Minimizing the Number of Internal States in Incompletely Specified Sequential Networks
359 -- 366Roy L. Russo. Synthesis of Error-Tolerant Counters Using Minimum Distance Three State Assignments
367 -- 376Martin Cohn, Shimon Even. Identification and Minimization of Linear Machines
376 -- 382James H. Pugsley. Sequential Functions and Linear Sequential Machines
383 -- 393J. Goldberg, R. A. Short. Antiparallel Control Logic
394 -- 399A. J. Atrubin. A One-Dimensional Real-Time Iterative Multiplier
399 -- 403H. C. Brearley Jr.. ILLIAC II-A Short Description and Annotated Bibliography
403 -- 416M. S. Zucker. LOCS: An EDP Machine Logic and Control Simulator
417 -- 422Yaohan Chu. Direct Execution of Programs in Floating Code by Address Interpretation
423 -- 427H. Mott, C. C. Carroll. A Versatile Comparator for Encoding Devices
428 -- 434Morton H. Lewin, H. R. Beelitz, J. Guarracini. Fixed Resistor-Card Memory
434 -- 443Herbert A. Glucksman. A Parapropagation Pattern Classifier
443 -- 455Arthur I. Rubin, G. F. Graber. Acoustic Ray Tracing on the General-Purpose Electronic-Analog Computer
456 -- 463Robert M. Deiters. Optimum Design of a Diode Squarer by Applying the Criterion of Square Root of the Integral of Per Cent Error Squared
464 -- 466Arthur Gill. On the Bound to the Memory of a Sequential Machine
466 -- 467Gregory J. Chaitin. An Improvement on a Theorem of E. F. Moore
467 -- 472Stephen S. Yau. Autonomous Clocks in Sequential Machines
472 -- 475Stephen H. Unger. Flow Table Simplification-Some Useful Aids
475 -- 481Otakar A. Horna. A Geometric Synthesis Method of Three-Input Majority Logic Networks
481 -- 485Haruhisa Ishida, Robert M. Stewart Jr.. A Learning Network Using Adaptive Threshold Elements
485 -- 488James F. Gimpel. A Method of Producing a Boolean Function Having an Arbitrarily Prescribed Prime Implicant Table
488 -- 0Sheldon B. Akers Jr.. On the Construction of (d, k) Graphs
488 -- 490Robert F. Rosin. A Special Purpose Computer for Solution of Partial Differential Equations and Other Iterative Algorithms
491 -- 492G. K. Aggarwal. Effect of Finite Gain on One-Amplifier Circuits
492 -- 0Walter Del Picchia. New Type of Transistorized Digital Analog Converter

Volume 14, Issue 2

125 -- 136Saburo Muroga. Generation and Asymmetry of Self-Dual Threshold Functions
136 -- 148Saburo Muroga. Lower Bounds of the Number of Threshold Functions and a Maximum Weight
148 -- 156Janusz A. Brzozowski. Regular Expressions for Linear Sequential Circuits
157 -- 172Herschel H. Loomis Jr.. Completeness of Sets of Delayed-Logic Devices
173 -- 174Herschel H. Loomis Jr., Robert H. Wyman Jr.. On Complete Sets of Logic Primitives
174 -- 181Sheldon B. Akers Jr.. A Diagrammatic Approach to Multilevel Logic Synthesis
181 -- 185Gernot Metze. Minimal Square Rooting
186 -- 196Bently A. Crane, J. A. Githens. Bulk Processing in Distributed Logic Memory
196 -- 203Charles J. Peters. A Magnetically Scanned Magnetic Tape Transducer
204 -- 209Hugh M. Sierra. Linear, Passive, Matched Filter for Digital Magnetic Recording
210 -- 217Frank N. Marzocco. Computer Recognition of Handwritten First Names
217 -- 229C. P. Gilbert, B. J. J. McHugh. Economical Circuits for the Analog Solution of Algebraic Equations
229 -- 233J. J. Vidal, S. M. Bawin. Frequency Analysis of Truncation Errors in RC Networks
233 -- 238S. K. Chan, E. F. Kurtz. On Using an Analog Computer to Study Hydrodynamic Stability
239 -- 243Charles F. Hepner. Improved Methods of Simulating Time Delays
243 -- 247Amos Nathan. The Cascade Multiplier
247 -- 0S. K. Chan, E. F. Kurtz. Correction [to "An approach to single-threshold-element synthesis"]
248 -- 0Jorge Santos, Héctor Arango, Manuel Pascual. A Ternary Storage Element Using a Conventional Ferrite Core
248 -- 250B. Scheff. Using a Decision-Table Structure as the Input Language Format for Programming Automatic Test Equipment Systems
250 -- 252Kenneth R. Kaplan, Robert O. Winder. Chebyshev Approximation and Threshold Functions
252 -- 254Robert O. Winder. Properties of Threshold Functions
254 -- 256Earl E. Gose. A Synthesis Technique for Networks Consisting of Logical Functions Feeding a Linear Summation Element
256 -- 260J. E. Price. Counting with Majority-Logic Networks
260 -- 261Richard Wesley Hamming, Wanda L. Mammel. A Note on the Location of the Binary Point in a Computing Machine
261 -- 0Donald W. Davies. Longest "Separated" Paths and Loops in an N Cube
262 -- 265Irving S. Reed. Some Remarks on State Reduction of Asynchronous Circuits by the Paull-Unger Method
265 -- 267Stuart B. Lerner. Hazard Correction in Asynchronous Sequential Circuits
267 -- 270R. W. Ahrons. Calculations of Speed of Ladder Network for Superconductive Associative Memories
270 -- 271Maurice V. Wilkes. Slave Memories and Dynamic Storage Allocation

Volume 14, Issue 1

7 -- 8Michael Yoeli, G. Rosenfeld. A New Reader Service-Publication of Informational Retrieval Catalog Cards
8 -- 18Ching Lai Sheng. A Graphical Interpretation of Realization of Symmetric Boolean Functions with Threshold Logic Elements
19 -- 29Michael Yoeli, G. Rosenfeld. Logical Design of Ternary Switching Circuits
29 -- 35R. H. S. Riordan, R. R. A. Morton. The Use of Analog Techniques in Binary Arithmetic Units
36 -- 44Charles P. Womack. Schmoo Plot Analysis of Coincident-Current Memory Systems
44 -- 52K. Fukunaga, T. Ito. A Design Theory of Recognition Functions in Self-Organizing Systems
53 -- 61Arthur Hausner. The Solution of Lagrange's Equations by Analog Computation
61 -- 0R. E. Burke, J. G. Van Bosse. Correction [to "Some techniques of state assignment for synchronous sequential machines"]
62 -- 63C. Hugh Mays. The Relationship of Algorithms Used with Adjustable Threshold Elements to Differential Equations
63 -- 65R. E. Burke, J. G. Van Bosse. NAND-AND Circuits
65 -- 66C. Hugh Mays. The Boundary Matrix of Threshold Functions
66 -- 68C. K. Chow. Statistical Independence and Threshold Functions
69 -- 72J. E. Olivares. Synthesis of Nonconstant Weight Binary Codes for Minimum Diode Counters
72 -- 75R. S. Gaines, Chester V. Lee. An Improved Cell Memory
75 -- 76Thomas A. Kriz, T. Koryu Ishii. Microwave Readout of Ferrite Memory Storage
76 -- 79Sundaram Seshu. On an Improved Diagnosis Program
79 -- 81R. A. Smith. Minimal Three-Variable NOR and NAND Logic Circuits
82 -- 85Richard M. Brown. An Experimental Study of an On-Line Man-Computer System
85 -- 86W. H. Specker. -1 x