| 1033 | -- | 1041 | Jesús Arias, Peter Kiss, Vito Boccuzzi, Luis Quintanilla, Lourdes Enríquez, José Vicente, David Bisbal, Jacinto San Pablo, Juan Barbolla. Nonlinearity correction for multibit ΔΣ DACs |
| 1042 | -- | 1048 | Chirn Chye Boon, Manh Anh Do, Kiat Seng Yeo, Jianguo Ma. Fully integrated CMOS fractional-N frequency divider for wide-band mobile applications with spurs reduction |
| 1049 | -- | 1060 | Thomas Y. W. Choi, Paul Merolla, John V. Arthur, Kwabena Boahen, Bertram E. Shi. Neuromorphic implementation of orientation hypercolumns |
| 1061 | -- | 1072 | S. M. Rezaul Hasan. Design of a low-power 3.5-GHz broad-band CMOS transimpedance amplifier for optical transceivers |
| 1073 | -- | 1085 | Payam Heydari. Characterizing the effects of the PLL jitter due to substrate noise in discrete-time delta-sigma modulators |
| 1086 | -- | 1094 | Slawomir Koziel, Rolf Schaumann, Haiqiao Xiao. Analysis and optimization of noise in continuous-time OTA-C filters |
| 1095 | -- | 1103 | Kazuki Nakada, Tetsuya Asai, Yoshihito Amemiya. Analog CMOS implementation of a CNN-based locomotion controller with floating-gate devices |
| 1104 | -- | 1114 | Rajesh Narasimha, Sripriya R. Bandi, Raghuveer M. Rao, Ponnathpur R. Mukund. 1/f noise synthesis model in discrete-time for circuit simulation |
| 1115 | -- | 1124 | Peter Sjöblom, Henrik Sjöland. An adaptive impedance tuning CMOS circuit for ISM 2.4-GHz band |
| 1125 | -- | 1137 | Doru-Florin Chiper, M. N. Shanmukha Swamy, M. Omair Ahmad, Thanos Stouraitis. Systolic algorithms and a memory-based design approach for a unified architecture for the computation of DCT/DST/IDCT/IDST |
| 1138 | -- | 1147 | Marian K. Kazimierczuk, Vladimir G. Krizhanovski, Julia V. Rassokhina, Dmitrii V. Chernov. Class-E MOSFET tuned power oscillator design procedure |
| 1148 | -- | 1156 | Chien-Ching Lin, Yen-Hsu Shih, Hsie-Chia Chang, Chen-Yi Lee. Design of a power-reduction Viterbi decoder for WLAN applications |
| 1157 | -- | 1165 | Saraju P. Mohanty, Nagarajan Ranga Ranganathan. Simultaneous peak and average power minimization during datapath scheduling |
| 1166 | -- | 1178 | Leonel Sousa, Ricardo Chaves. n+1 multipliers |
| 1179 | -- | 1187 | Feng Ding, Tongwen Chen. Hierarchical identification of lifted state-space models for general dual-rate systems |
| 1188 | -- | 1204 | Emad Gad, Michel S. Nakhla. Efficient model reduction of linear periodically time-varying systems via compressed transient system function |
| 1205 | -- | 1210 | Shuiping Luo, Zhizhang Chen. Extraction of causal time-domain network parameters from their band-limited frequency-domain counterparts using rational functions |
| 1211 | -- | 1223 | Derk Reefman, Joshua D. Reiss, Erwin Janssen, Mark B. Sandler. Description of limit cycles in sigma-delta modulators |
| 1224 | -- | 1235 | Alexey Teplinsky, Emer Condon, Orla Feely. Driven interval shift dynamics in sigma-delta modulators and phase-locked loops |
| 1236 | -- | 1247 | Wai Lok Woo, Satnam Singh Dlay. Neural network approach to blind signal separation of mono-nonlinearly mixed sources |