| 905 | -- | 0 | Tor Sverre Lande, Peter T. J. Liang, Gabriele Manganaro, Eduardo A. B. da Silva, Aleksandar Tasic. Guest Editorial Special Issue on ISCAS 2011 |
| 906 | -- | 914 | Yu Lin, Kostas Doris, Hans Hegt, Arthur H. M. van Roermund. An 11b Pipeline ADC With Parallel-Sampling Technique for Converting Multi-Carrier Signals |
| 915 | -- | 925 | Liyuan Liu, Dongmei Li, Liangdong Chen, Yafei Ye, Zhihua Wang. A 1-V 15-Bit Audio ΔΣ-ADC in 0.18 µm CMOS |
| 926 | -- | 937 | Jing Jin, Xiaoming Liu, Tingting Mo, Jianjun Zhou. Quantization Noise Suppression in Fractional-N PLLs Utilizing Glitch-Free Phase Switching Multi-Modulus Frequency Divider |
| 938 | -- | 945 | Andrea Bevilacqua, Pietro Andreani. An Analysis of 1/f Noise to Phase Noise Conversion in CMOS Harmonic Oscillators |
| 946 | -- | 957 | Shreyas Sen, Debashis Banerjee, Marian Verhelst, Abhijit Chatterjee. A Power-Scalable Channel-Adaptive Wireless Receiver Based on Built-In Orthogonally Tunable LNA |
| 958 | -- | 968 | Paul P. Sotiriadis, Kostas Galanopoulos. Direct All-Digital Frequency Synthesis Techniques, Spurs Suppression, and Deterministic Jitter Correction |
| 969 | -- | 978 | Victor Rodolfo Gonzalez-Diaz, Aldo Pena-Perez, Franco Maloberti. Fractional Frequency Synthesizers With Low Order Time-Variant Digital Sigma-Delta Modulator |
| 979 | -- | 988 | Mauricio Pardo, Logan Sorenson, Farrokh Ayazi. An Empirical Phase-Noise Model for MEMS Oscillators Operating in Nonlinear Regime |
| 989 | -- | 1000 | Soo-Chang Pei, Jong-Jy Shyu, Yun-Da Huang, Cheng-Han Chan. Improved Methods for the Design of Variable Fractional-Delay IIR Digital Filters |
| 1001 | -- | 1014 | Mauro Mangia, Riccardo Rovatti, Gianluca Setti. Rakeness in the Design of Analog-to-Information Conversion of Sparse and Localized Signals |
| 1015 | -- | 1028 | Simin Yu, Jinhu Lu, Xinghuo Yu, Guanrong Chen. Design and Implementation of Grid Multiwing Hyperchaotic Lorenz System Family via Switching Control and Constructing Super-Heteroclinic Loops |
| 1029 | -- | 1041 | Massimiliano de Magistris, Mario di Bernardo, Edmondo Di Tucci, Sabato Manfredi. Synchronization of Networks of Non-Identical Chua's Circuits: Analysis and Experiments |
| 1042 | -- | 1050 | Yoko Uwate, Yoshifumi Nishio. Synchronization in Several Types of Coupled Polygonal Oscillatory Networks |
| 1051 | -- | 1060 | Harika Manem, Jeyavijayan Rajendran, Garrett S. Rose. Stochastic Gradient Descent Inspired Training Technique for a CMOS/Nano Memristive Trainable Threshold Gate Array |
| 1061 | -- | 1073 | Chamith Wijenayake, Yongsheng Xu, Arjuna Madanayake, Leonid Belostotski, Leonard T. Bruton. RF Analog Beamforming Fan Filters Using CMOS All-Pass Time Delay Approximations |
| 1074 | -- | 1084 | Jordi Bonet-Dalmau, F. Xavier Moncunill-Geniz, Pere Palà-Schönwälder, Francisco del Aguila-Lopez, M. Rosa Giralt-Mas. Frequency Domain Analysis of Superregenerative Receivers in the Linear and the Logarithmic Modes |
| 1085 | -- | 1092 | Carsten Barth, Ivan R. Linscott, Umran S. Inan. An Image Frequency Rejection Filter for SAW-Less GPS Receivers |
| 1093 | -- | 1106 | Shang-Kee Ting, Danijela Cabric, Ali H. Sayed. An Algorithm to Compensate the Effects of Spurious PLL Tones in Spectrum Sensing Architectures |
| 1107 | -- | 1118 | Paul N. Whatmough, Marcus R. Perrett, Safa Isam, Izzat Darwazeh. VLSI Architecture for a Reconfigurable Spectrally Efficient FDM Baseband Transmitter |
| 1119 | -- | 1131 | Chenchang Zhan, Wing-Hung Ki. An Output-Capacitor-Free Adaptively Biased Low-Dropout Regulator With Subthreshold Undershoot-Reduction for SoC |
| 1132 | -- | 1141 | Song Xiong, Siew-Chong Tan, Siu Chung Wong. Analysis and Design of a High-Voltage-Gain Hybrid Switched-Capacitor Buck Converter |