Journal: IEEE Trans. on Circuits and Systems

Volume 62-II, Issue 11

1013 -- 1017Aidin Tofangdarzade, Ali Jalali. An Efficient Method to Analyze Lock Range in Ring Oscillators With Multiple Injections
1018 -- 1022Nghia Tang, Wookpyo Hong, Jong-Hoon Kim, Youngoo Yang, Deukhyoun Heo. A Sub-1-V Bulk-Driven Opamp With an Effective Transconductance-Stabilizing Technique
1023 -- 1027Dong-Hoon Jung, Young-Jae An, Kyungho Ryu, Jung-Hyun Park, Seong-Ook Jung. All-Digital Fast-Locking Delay-Locked Loop Using a Cyclic-Locking Loop for DRAM
1028 -- 1032Young-Joon Kim, Hansraj S. Bhamra, Jithin Joseph, Pedro P. Irazoqui. An Ultra-Low-Power RF Energy-Harvesting Transceiver for Multiple-Node Sensor Application
1033 -- 1037Kai-Hui Zeng, Ting-Kuei Kuan, Shen-Iuan Liu. A Subharmonically Injection-Locked All-Digital PLL Without Main Divider
1038 -- 1042Daniel J. White, Michael W. Hoffman, Sina Balkir. Digital Offset Cancellation for Long Time-Constant Subthreshold OTA-C Integrators
1043 -- 1047Changhyuk Lee, Wei Chao, SunWoo Lee, James Hone, Alyosha C. Molnar, Sang Hoon Hong. A Low-Power Edge Detection Image Sensor Based on Parallel Digital Pulse Computation
1048 -- 1052Il Won Seo, Eun Sik Jung, Man Young Sung. An Analog Front-End IC Design for 320 × 240 Microbolometer Array Applications
1053 -- 1057Rakesh Kumar Palani, Ramesh Harjani. A 220-MS/s 9-Bit 2X Time-Interleaved SAR ADC With a 133-fF Input Capacitance and a FOM of 37 fJ/conv in 65-nm CMOS
1058 -- 1062Duksoo Kim, Byungjoon Kim, Sangwook Nam. m3 Canceling
1063 -- 1067Yue Hu, Hariprasath Venkatram, Nima Maghari, Un-Ku Moon. A Continuous-Time ΔΣ ADC Utilizing Time Information for Two Cycles of Excess Loop Delay Compensation
1068 -- 1072Jaehwan Jung, Hoyoung Yoo, Youngjoo Lee, In-Cheol Park. Efficient Parallel Architecture for Linear Feedback Shift Registers
1073 -- 1077Chang-Hung Tsai, Yu-Ting Chih, Wing Hung Wong, Chen-Yi Lee. A Hardware-Efficient Sigmoid Function With Adjustable Precision for a Neural Network System
1078 -- 1082Zia Uddin Ahamed Khan, Mohammed Benaissa. Throughput/Area-efficient ECC Processor Using Montgomery Point Multiplication on FPGA
1083 -- 1087Jinqi Liu, Qianjian Xing, Xiaobo Yin, Xiubin Mao, Feng Yu. Pipelined Architecture for a Radix-2 Fast Walsh-Hadamard-Fourier Transform Algorithm
1088 -- 1092Xinyu Wu, Vishal Saxena, Kehan Zhu, Sakkarapani Balagopal. A CMOS Spiking Neuron for Brain-Inspired Neural Networks With Resistive Synapses and In Situ Learning
1093 -- 1097Chu Yu, Yu-Shan Su. Two-Mode Reed-Solomon Decoder Using A Simplified Step-by-Step Algorithm
1098 -- 1102Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat. NISC-Based Soft-Input-Soft-Output Demapper
1103 -- 1107Hadi Alasti, Saeed Gazor. 2n QAM