Journal: IEEE Trans. Circuits Syst. II Express Briefs

Volume 69, Issue 10

3972 -- 0Edoardo Bonizzoni, Sebastian Hoyos. Guest Editorial Special Issue on the 2022 ISICAS: A CAS Journal Track Symposium
3973 -- 3977Pingcheng Dong, Zhuoyu Chen, Zhuoao Li, Ruoheng Yao, Wenyue Zhang, Yangyi Zhang, Lei Chen, Chao Wang, Fengwei An. Configurable Image Rectification and Disparity Refinement for Stereo Vision
3978 -- 3982Ayano Nakashima, Rei Ueno, Naofumi Homma. AES S-Box Hardware With Efficiency Improvement Based on Linear Mapping Optimization
3983 -- 3987Zhiming Li, Lei Dong, Hao Li, Jie Zhang 0039, Xiaofei Wang, Hong Zhang 0009. An Analog Readout Circuit With a Noise-Reduction Input Buffer for MEMS Microphone
3988 -- 3992Shipra, Girish Chandra Tripathi, Meenakshi Rawat. Power Amplifier Linearization in the Presence of Crosstalk and Measurement Noise in MIMO System
3993 -- 3997Nishanth Basavaraj, Saravana Manivannan, Shanthi Pavan. Simplified Simulation and Measurement of the Signal Transfer Function of a Continuous-Time Pipelined Analog-to-Digital Converter
3998 -- 4002Chao Yang, Xiaoming Liu 0008, Jing Jin 0005, Yuekang Guo, Jianjun Zhou. A Fast-Settling Phase-Locked Loop Utilizing Cycle-Slipping-Elimination PFDCP
4003 -- 4007Lei Xuan, Ka-Fai Un, Chi-Seng Lam, Rui Paulo Martins. An FPGA-Based Energy-Efficient Reconfigurable Depthwise Separable Convolution Accelerator for Image Recognition
4008 -- 4012Shih-Hao Cheng, Meng-Hsueh Lee, Bing-Chen Wu, Tsung-Te Liu. A Lightweight Power Side-Channel Attack Protection Technique With Minimized Overheads Using On-Demand Current Equalizer
4013 -- 4017Zhe Liu 0038, Chirn Chye Boon. 2 2-12-GHz Noise-Cancelling Low-Noise Amplifier With Gain Improvement and Noise Reduction
4018 -- 4022Huaiyu Liu, Liang Qi, Guoxing Wang, Yan Liu 0016. A VCO-Based CTDSM With Integrated Phase Error Correction for Neural Interface
4023 -- 4027Joe Bachi, Ayssar Serhan, Dang-Kièn Germain Pham, Damien Parat, Pascal Reynier, Patricia Desgreys, Alexandre Giry. A Novel Approach for Doherty PA Design Using a Compact L-C Combiner
4028 -- 4032Yaqian Sun, Wei Deng 0001, Haikun Jia, Zhihua Wang 0001, Baoyong Chi. A 4.4-GHz 193.2-dB FoM 8-Shaped-Inductor Based LC-VCO Using Orthogonal-Coupled Triple-Coil Transformer
4033 -- 4037Zhaobo Zhang, Chenchang Zhan, Lidan Wang, Man Kay Law. A - °C-125 °C 0.4-μA Low-Noise Bandgap Voltage Reference With 0.8-mA Load Driving Capability Using Shared Feedback Resistors
4038 -- 4042Hanyue Li, Yuting Shen, Eugenio Cantatore, Pieter Harpe. Small-Area SAR ADCs With a Compact Unit-Length DAC Layout
4043 -- 4047Kiho Seong, Jae-Soub Han, Yong Shim, Kwang-Hyun Baek. A 2.5 GS/s 7-Bit 5-Way Time-Interleaved SAR ADC With On-Chip Background Offset and Timing-Skew Calibration
4048 -- 4052Yongqian Su, Weiwei Shi 0001, Lizhi Hu, Suixing Zhuang. Implementation of SVM-Based Low Power EEG Signal Classification Chip
4053 -- 4057Heesung Roh, Youngwoo Ji, Jae-Yoon Sim. An Auto-Configurable Dual-Mode MPPT for Energy Harvesting With 12 nW-180 mW Conversion Range
4058 -- 4062Jaehan Park, Byungjun Kim, Jae-Yoon Sim. A PVT-Tolerant Oscillation-Collapse-Based True Random Number Generator With an Odd Number of Inverter Stages
4063 -- 4067Yue Zhong, Wing-Hung Ki, Junmin Jiang. Fully-Integrated Switched-Capacitor Converter With Capacitor Bridging for Improved Current Density
4068 -- 4072Zewen Ye, Ray C. C. Cheung, Kejie Huang. PipeNTT: A Pipelined Number Theoretic Transform Architecture
4073 -- 4077Ankur Bal, Rupesh Singh, Aradhana Kumari, Vikas Dhanda. 2, 0.44-pJ/b, 2-Gb/s All-Digital Fully Synthesizable CDR for Serial Links Using Single-Phase Input Clock
4078 -- 4082Akiyoshi Tanaka, Guowei Chen, Kiichi Niitsu. A 4.5-mW 22-nm CMOS Label-Free Frequency-Shift 3 × 3 × 2 3-D Biosensor Array Using Vertically Stacked 60-GHz LC Oscillators
4083 -- 4087Hyunki Jung, Kyung-Sik Choi, Keun-Mok Kim, Daehoon Jo, Jaeheon Lee, Jusung Kim, Jinho Ko, Sang-Gug Lee. CMOS Fractional-N Frequency Synthesizer for UHF RFID Reader Applications With Transformer-Based ISF Manipulation VCO
4088 -- 4092Ting Guo, Zhongzhiguang Lu, Kai Tang 0002, Chuanshi Yang, Bo Yu, Yuanjin Zheng. A Floating-Body Transistor-Based Power Amplifier for Sub-6-GHz 5G Applications in SOI CMOS 130-nm Process
4093 -- 4097Xiangdong Feng, Yunshan Zhang, Yangfan Xuan, Zhuhao Li, Changgui Yang, Xin Xie, Yuxuan Luo, Xiangwei Zhao, Yong Chen 0005, Bo Zhao. A Square-Wave Stimulated DNA Analyzer Chip Featuring 120μW Power Consumption and Simultaneous Dual-Frequency Detection
4098 -- 4102Alexandre Berthier, Anthony Ghiotto, Eric Kerherve, Lionel Vogt. Low Consumption Balanced Front-End Amplifiers Robust to Load Variations in 65nm PD-SOI CMOS Technology for 60 GHz Short-Range Wireless Applications
4103 -- 4107Xiao Zhang, Xinming Huang 0001. Real-Time Fast Channel Clustering for LiDAR Point Cloud
4108 -- 4112Farnaz Fahimi Hanzaee, Nazanin Neshatvar, Mohamad Rahal, Dai Jiang, Richard H. Bayford, Andreas Demosthenous. A Low-Power Recursive I/Q Signal Generator and Current Driver for Bioimpedance Applications
4113 -- 4117Qiuyan Xu, Aditya Wadaskar, Chung-Ching Lin, Han Yan, Veljko Boljanovic, Subhanshu Gupta, Danijela Cabric. A Switching-Less True-Time-Delay-Based Beam Probing Approach for Ultra-Low Latency Wireless Communications: System Analysis and Demonstration
4118 -- 4122Farhath Zareen, Mateus Augusto Fernandes Amador, Robert Karam. Hardware Immune System for Embedded IoT
4123 -- 4127Kai Li, Wei Mao 0002, Junzhuo Zhou, Boyu Li, Zhengke Yang, Shuxing Yang, Laimin Du, Sixiao Huang, Hao Yu 0001. A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing
4128 -- 4132Andrea Ballo, Alfio Dario Grasso, Gaetano Palumbo. A Bulk Current Regulation Technique for Dual-Branch Cross-Coupled Charge Pumps
4133 -- 4137Ya-Jie Wu, Wai-Hei Choi, Chi-Seng Lam, Man-Chung Wong, Sai-Weng Sin, Rui Paulo Martins. An FPGA-Based Self-Reconfigurable Arc Fault Detection System for Smart Meters
4138 -- 4142Alexander J. Leigh, Moslem Heidarpur, Mitra Mirhassani. A High-Accuracy Digital Implementation of the Morris-Lecar Neuron With Variable Physiological Parameters
4143 -- 4147Xun Liu, Junmin Jiang, Cheng Huang, Philip K. T. Mok. Loop Analysis and Stability Considerations of Hybrid PA Supply Modulators
4148 -- 4152SeungHyun Moon, Kyeong-Jun Lee, Han-Gyeol Mun, Byungjun Kim, Jae-Yoon Sim. An 8.9-71.3 TOPS/W Deep Learning Accelerator for Arbitrarily Quantized Neural Networks
4153 -- 4157Rakesh Kumar Palani, Srikar Bhagavatula, Denny K. Yuen. A Sub-1-V 8.5-ppm/°C Sampled Bandgap Voltage Reference
4158 -- 4162Kyeong-Jun Lee, SeungHyun Moon, Jae-Yoon Sim. A 384G Output NonZeros/J Graph Convolutional Neural Network Accelerator
4163 -- 4167Zhengbo Huang, Jie Zhang, Yuanjun Cen, Juan Wei, Qiang Yu, Jinda Yang, Hong Zhang 0009. A 6-GHz Bandwidth Input Buffer Based on AC-Coupled Flipped Source Follower for 12-bit 8-GS/s ADC in 28-nm CMOS
4168 -- 4172Nazanin Neshatvar, Matthew Schormans, Dai Jiang, Stefan Schmitt, Peter Detemple, Andreas Demosthenous. An Implantable Phase Locked Loop MEMS-Based Readout System for Heart Transplantation
4173 -- 4177Sibo Wen, Wen-Liang Zeng, Chi-Seng Lam, Franco Maloberti, Rui Paulo Martins. An Analog Multiplier Controlled Buck-Boost Converter
4178 -- 4182Yi-Long Liou, Jui-Yang Hsu, Chen-Sheng Chen, Alexander H. Liu, Hung-yi Lee, Tsung-Te Liu. A Fully Integrated 1.7mW Attention-Based Automatic Speech Recognition Processor
4183 -- 4187Andrew Dervay, Wenfeng Zhao. CIMulator: A Computing in Memory Emulator Framework