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| 35 | -- | 0 | Fahimeh Jafari, Zhonghai Lu, Axel Jantsch. Least Upper Delay Bound for VBR Flows in Networks-on-Chip with Virtual Channels |
| 36 | -- | 0 | Nicola Bombieri, Franco Fummi, Sara Vinco. A Methodology to Recover RTL IP Functionality for Automatic Generation of SW Applications |
| 37 | -- | 0 | Stefan Holst, Michael E. Imhof, Hans-Joachim Wunderlich. High-Throughput Logic Timing Simulation on GPGPUs |
| 38 | -- | 0 | Tong Xu, Peng Li, Savithri Sundareswaran. Decoupling Capacitance Design Strategies for Power Delivery Networks with Power Gating |
| 39 | -- | 0 | Farshad Firouzi, Fangming Ye, Krishnendu Chakrabarty, Mehdi Baradaran Tahoori. Aging- and Variation-Aware Delay Monitoring Using Representative Critical Path Selection |
| 40 | -- | 0 | HeeJong Park, Avinash Malik, Zoran A. Salcic. Scheduling Globally Asynchronous Locally Synchronous Programs for Guaranteed Response Times |
| 41 | -- | 0 | Qiuping Yi, Zijiang Yang, Jian Liu, Chen Zhao, Chao Wang. Explaining Software Failures by Cascade Fault Localization |
| 42 | -- | 0 | Jong Chul Lee, Roman L. Lysecky. System-Level Observation Framework for Non-Intrusive Runtime Monitoring of Embedded Systems |
| 43 | -- | 0 | Qi Zhang, Xuandong Li, Linzhang Wang, Tian Zhang, Yi Wang 0003, Zili Shao. Lazy-RTGC: A Real-Time Lazy Garbage Collection Mechanism with Jointly Optimizing Average and Worst Performance for NAND Flash Memory Storage Systems |
| 44 | -- | 0 | Namita Sharma, Preeti Ranjan Panda, Francky Catthoor, Praveen Raghavan, Tom Vander Aa. Array Interleaving - An Energy-Efficient Data Layout Transformation |
| 45 | -- | 0 | Sudip Roy 0001, Partha Pratim Chakrabarti, Srijan Kumar, Krishnendu Chakrabarty, Bhargab B. Bhattacharya. Layout-Aware Mixture Preparation of Biochemical Fluids on Application-Specific Digital Microfluidic Biochips |
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