| 97 | -- | 98 | Li-Shiuan Peh, Timothy Mark Pinkston. Guest Editorial: Special Section on On-Chip Networks |
| 99 | -- | 112 | Neal K. Bambha, Shuvra S. Bhattacharyya. Joint Application Mapping/Interconnect Synthesis Techniques for Embedded Chip-Scale Multiprocessors |
| 113 | -- | 129 | Davide Bertozzi, Antoine Jalabert, Srinivasan Murali, Rutuparna Tamhankar, Stergios Stergiou, Luca Benini, Giovanni De Micheli. NoC Synthesis Flow for Customized Domain Specific Multiprocessor Systems-on-Chip |
| 130 | -- | 144 | Joan-Manuel Parcerisa, Julio Sahuquillo, Antonio González. On-Chip Interconnects and Instruction Steering Schemes for Clustered Microarchitectures |
| 145 | -- | 162 | Michael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal. Scalar Operand Networks |
| 163 | -- | 174 | Yunhao Liu, Li Xiao, Xiaomei Liu, Lionel M. Ni, Xiaodong Zhang. Location Awareness in Unstructured Peer-to-Peer Systems |
| 175 | -- | 182 | Dror G. Feitelson. Experimental Analysis of the Root Causes of Performance Evaluation Results: A Backfilling Case Study |
| 183 | -- | 192 | Takashi Harada, Masafumi Yamashita. Transversal Merge Operation: A Nondominated Coterie Construction Method for Distributed Mutual Exclusion |