Walter Lee - researchr alias

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Viewing Publication 1 - 18 from 18

2018

Toward a National Agenda for Broadening Participation of African Americans in Engineering & Computer Science: A Methodological Overview of Phase IIChanee D. Hawkins Ash, Walter Lee, Jeremi London, Teirra Holloman, Gilbert Jew, Atota Halkiyo, Bevlee A. Watford. mcs 2018: 1-5 [doi]

2017

Student attitudes about diversity: "If the field of engineering were more diverse, what would that mean for you?"Ashley Taylor, Raeven Waters, Sreyoshi Bhaduri, Benjamin Lutz, Walter Lee. mcs 2017: 1-9 [doi]

Leveraging a multi-partner approach to develop successful STEM outreach programsGlenda D. Young, David B. Knight, Walter Lee, Monica Cardella, Morgan Hynes, Karl Reid, Trina Fletcher. mcs 2017: 1-5 [doi]

2009

Tiled Multicore ProcessorsMichael Bedford Taylor, Walter Lee, Jason E. Miller, David Wentzlaff, Ian Bratt, Ben Greenwald, Henry Hoffmann, Paul R. Johnson, Jason Sungtae Kim, James Psota, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Matthew I. Frank, Saman P. Amarasinghe, Anant Agarwal. In Stephen W. Keckler, Kunle Olukotun, H. Peter Hofstee, editors, Multicore Processors and Systems. Integrated Circuits and Systems, pages 1-33, Springer, 2009. [doi]

2005

Scalar Operand NetworksMichael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal. tpds, 16(2):145-162, 2005. [doi]

2004

Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and StreamsMichael Bedford Taylor, Walter Lee, Jason E. Miller, David Wentzlaff, Ian Bratt, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jason Sungtae Kim, James Psota, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Matthew Frank, Saman P. Amarasinghe, Anant Agarwal. isca 2004: 2-13 [doi]

2003

Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned ArchitectureMichael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal. hpca 2003: 341-353 [doi]

2002

2001

Compiler Support for Scalable and Efficient Memory SystemsRajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal. TC, 50(11):1234-1247, 2001. [doi]

Strength Reduction of Integer Division and Modulo OperationsJeffrey Sheldon, Walter Lee, Ben Greenwald, Saman P. Amarasinghe. lcpc 2003: 254-273 [doi]

1999

Parallelizing Applications into SiliconJonathan Babb, Martin C. Rinard, Csaba Andras Moritz, Walter Lee, Matthew Frank, Rajeev Barua, Saman P. Amarasinghe. fccm 1999: 70 [doi]

Maps: A Compiler-Managed Memory System for Raw MachinesRajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal. isca 1999: 4-15 [doi]

1998

1997

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