Abstract is missing.
- Control Speculation in Multithreaded Processors through Dynamic Loop DetectionJordi Tubella, Antonio González. 14-23 [doi]
- Performance Study of a Concurrent Multithreaded ProcessorJenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chung Yew. 24-35 [doi]
- The Sensitivity of Communication Mechanisms to Bandwidth and LatencyFrederic T. Chong, Rajeev Barua, Fredrik Dahlgren, John Kubiatowicz, Anant Agarwal. 37-46 [doi]
- Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM SwitchManolis Katevenis, Dimitrios N. Serpanos, Emmanuel Spyridakis. 47-56 [doi]
- A Very Efficient Distributed Deadlock Detection Mechanism for Wormhole NetworksPedro López, Juan Miguel Martínez, José Duato. 57 [doi]
- Challenging Applications on Fast NetworksKoen Langendoen, Rutger F. H. Hofman, Henri E. Bal. 68-79 [doi]
- Architectural Implications of a Family of Irregular ApplicationsDavid R. O Hallaron, Jonathan Richard Shewchuk, Thomas R. Gross. 80-89 [doi]
- The Architectural Costs of Streaming I/O: A Comparison of Workstations, Clusters, and SMPsRemzi H. Arpaci-Dusseau, Andrea C. Arpaci-Dusseau, David E. Culler, Joseph M. Hellerstein, David A. Patterson. 90-101 [doi]
- The Effectiveness of SRAM Network Caches in Clustered DSMsAdrian Moga, Michel Dubois. 103-112 [doi]
- Home-Based SVM Protocols for SMP Clusters: Design and PerformanceRudrajit Samanta, Angelos Bilas, Liviu Iftode, Jaswinder Pal Singh. 113-124 [doi]
- Fine-Grain Software Distributed Shared Memory on SMP ClustersDaniel J. Scales, Kourosh Gharachorloo, Anshu Aggarwal. 125-136 [doi]
- Enhancing Memory Use in Simple Coma: Multiplexed Simple ComaSujoy Basu, Josep Torrellas. 152-161 [doi]
- Virtual-Physical RegistersAntonio González, José González, Mateo Valero. 175-184 [doi]
- Supporting Highly-Speculative Execution via Adaptive Branch TreesTien-Fu Chen. 185-194 [doi]
- Speculative Versioning CacheSridhar Gopal, T. N. Vijaykumar, James E. Smith, Gurindar S. Sohi. 195-205 [doi]
- The Impact of Data Transfer and Buffering Alternatives on Network Interface DesignShubhendu S. Mukherjee, Mark D. Hill. 207-218 [doi]
- Exploiting Two-Case Delivery for Fast Protected MessagingKenneth Mackenzie, John Kubiatowicz, Matthew Frank, Walter Lee, Victor Lee, Anant Agarwal, M. Frans Kaashoek. 231-242 [doi]
- Temporal-Based Procedure Reordering for Improved Instruction Cache PerformanceJohn Kalamatianos, David R. Kaeli. 244-253 [doi]
- Performance Evaluation of Tiling for the Register LevelMarta Jiménez, José M. Llabería, Agustin Fernández. 254-265 [doi]
- Treegion Scheduling for Wide Issue ProcessorsWilliam A. Havanki, Sanjeev Banerjia, Thomas M. Conte. 266-276 [doi]
- Communication Across Fault-Containment Firewalls on the SGI OriginKaushik Ghosh, Allan J. Christie. 277-287 [doi]
- Using Multicast and Multithreading to Reduce Communication in Software DSM SystemsEvan Speight, John K. Bennett. 312 [doi]
- FPGA Based Custom Computing Machines for Irregular ProblemsDavid Abramson, Paul Logothetis, Adam Postula, Marcus Randall. 324-333 [doi]
- Non-Stalling CounterFlow ArchitectureMichael F. Miller, Kenneth J. Janik, Shih-Lien Lu. 334-341 [doi]
- Partial Sampling with Reverse State Reconstruction: A New Technique for Branch Predictor Performance EstimationDarren Erik Vengroff, Guang R. Gao. 342-351 [doi]