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    Journal: VLSI Design

    Volume 5, Issue 1

    1 -- 10Kuo-En Chang, Sei-Wang Chen. An Efficient and Fast Algorithm for Routing Over the Cells
    11 -- 21Dinesh Bhatia, V. Shankar. Greedy Segmented Channel Router
    23 -- 36Gudni Gudmundsson, Simeon C. Ntafos. A Greedy Algorithm for Over-The-Cell Channel Routing
    37 -- 48Youssef Saab. A Fast Clustering-Based Min-Cut Placement Algorithm With Simulated-Annealing Performance
    49 -- 57Bhanu Kapoor, V. S. S. Nair. Improving Path Sensitizability of Combinational Circuits
    59 -- 75Jiabi Zhu, Mostafa I. H. Abd-El-Barr, Carl McCrosky. A New Theory for Testability-Preserving Optimization of Combinational Circuits
    77 -- 87C. P. Ravikumar, Vikram Saxena. TOGAPS: A Testability Oriented Genetic Algorithm For Pipeline Synthesis
    89 -- 100Donald T. Comer. Zener Zap Anti-Fuse Trim in VLSI Circuits
    101 -- 110Murray W. Pearson, Paul J. Lyons, Mark D. Apperley. High-Level Graphical Abstraction in Digital Design
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