External Links

    Journal: VLSI Signal Processing

    Volume 31, Issue 3

    191 -- 206Luca Breveglieri, Vincenzo Piuri. Digital Median Filters
    207 -- 229Ramaswamy Govindarajan, Guang R. Gao, Palash Desai. Minimizing Buffer Requirements under Rate-Optimal Schedule in Regular Dataflow Networks
    231 -- 241A. Benjamin Premkumar, A. S. Madhukumar. An Efficient VLSI Architecture for the Computation of 1-D Discrete Wavelet Transform
    243 -- 261Ki-Seok Chung, Rajesh K. Gupta, Taewhan Kim, C. L. Liu. Synthesis and Optimization of Combinational Interface Circuits
    263 -- 271Neil Burgess. The Flagged Prefix Adder and its Applications in Integer Arithmetic
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