Journal: VLSI Signal Processing

Volume 49, Issue 1

1 -- 2Joseph R. Cavallaro, Sanjay Rajopadhye, Lothar Thiele, Tobias Noll. Special Issue on ASAP 2004 Conference
3 -- 18Liang-Kai Wang, Michael J. Schulte. A Decimal Floating-Point Divider Using Newton-Raphson Iteration
19 -- 30Milos D. Ercegovac, Jean-Michel Muller. Complex Square Root with Operand Prescaling
31 -- 50Anup Hosangadi, Farzan Fallah, Ryan Kastner. Algebraic Methods for Optimizing Constant Multiplications in Linear Systems
51 -- 71Tuomas Järvinen, Perttu Salmela, Harri Sorokin, Jarmo Takala. Stride Permutation Networks for Array Processors
73 -- 85Antoine Fraboulet, Tanguy Risset. Master Interface for On-chip Hardware Accelerator Burst Communications
87 -- 99Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin. Reliability-aware Co-synthesis for Embedded Systems
101 -- 121Praveen Krishnamurthy, Jeremy Buhler, Roger D. Chamberlain, Mark A. Franklin, Kwame Gyang, Arpith C. Jacob, Joseph M. Lancaster. Biosequence Similarity Search on the ::::Mercury:::: System
123 -- 138Youcef Bouchebaba, Bruno Girodias, Fabien Coelho, Gabriela Nicolescu, El Mostapha Aboulhamid. Buffer and Register Allocation for Memory Space Optimization
139 -- 159Maher E. Rizkalla, Paul Salama, Mohamed El-Sharkawy, Modukuri Sushmitha. Hardware Implementation of Block-based Motion Estimation for Real Time Applications
161 -- 175Jérémie Detrey, Florent de Dinechin. A Tool for Unbiased Comparison between Logarithmic and Floating-point Arithmetic
177 -- 183Earl E. Swartzlander Jr.. The Negative Two s Complement Number System
185 -- 206Vijay Nagarajan, Stefan Laendner, Nikhil Jayakumar, Olgica Milenkovic, Sunil P. Khatri. High-throughput VLSI Implementations of Iterative Decoders and Related Code Construction Problems
207 -- 216Jesus E. Molinar-Solis, Felipe Gomez-Castaneda, Jose A. Moreno-Cadenas, Victor H. Ponce-Ponce. Programmable CMOS CNN Cell Based on Floating-gate Inverter Unit