Journal: VLSI Signal Processing

Volume 67, Issue 3

201 -- 212Salvatore Pontarelli, Gian-Carlo Cardarilli, Marco Re, Adelio Salsano. Optimized Implementation of RNS FIR Filters Based on FPGAs
213 -- 228Jianwei Niu, Meikang Qiu, Xiaofei Wang, Jiayin Li, Gang Wu, Tianzhou Chen. Cost Minimization with HPDFG and Data Mining for Heterogeneous DSP
229 -- 237Kavallur Gopi Smitha, A. Prasad Vinod. A Reconfigurable Channel Filter for Software Defined Radio Using RNS
239 -- 253Jiayin Li, Meikang Qiu, Jianwei Niu, Yongxin Zhu, Meiqin Liu, Tianzhou Chen. Three-Phase Algorithms for Task Scheduling in Distributed Mobile DSP System with Lifetime Constraints
255 -- 268Evangelos Vassalos, Dimitris Bakalis. CSD-RNS-based Single Constant Multipliers
269 -- 277Davinder Pal Sharma, Jasvir Singh. Simulation and Spectral Analysis of the Scrambler for 56Kbps Modem
279 -- 290Chia-Te Liao, Wen-Hao Lee, Shang-Hong Lai. A Flexible PCB Inspection System Based on Statistical Learning
291 -- 303Byung Cheol Song, Yongseok Yi, Yun-Gu Lee, Nak Hoon Kim, Jun Hyuk Ko, Tae-Hee Kim, Dong-Keun Lim, Woo Hyun Ju, Jae-Pil Moon, Kyunghwan Cho. 1080p 60 Hz Intra-Frame Video CODEC Chip Design and Its Implementation
305 -- 316Shing-Chow Chan, Zhenyu Zhu, K. T. Ng, C. Wang, Shuai Zhang, Z. G. Zhang, Zhongfu Ye, Heung-Yeung Shum. The Design and Construction of a Movable Image-Based Rendering System and Its Application to Multiview Conferencing
317 -- 330Ke Xu, Min Zhang, Chiu-sing Choy. Design a Low-Power H.264/AVC Baseline Decoder at All Abstraction Levels - A Showcase
331 -- 0Jae Do Lee, Myung Hoon Sunwoo. Erratum to: Three-Parallel Reed-Solomon Decoder Using S-DCME for High-Speed Communications