Dimitris Bakalis - researchr alias

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Viewing Publication 1 - 41 from 41

2015

Lookahead Architectures for Hamming Distance and Fixed-Threshold Hamming Weight ComparatorsHaridimos T. Vergos, Dimitris Bakalis, A. Anastasiou. cssp, 34(4):1041-1056, 2015. [doi]

2013

2012

CSD-RNS-based Single Constant MultipliersEvangelos Vassalos, Dimitris Bakalis. vlsisp, 67(3):255-268, 2012. [doi]

SUT-RNS Residue-to-Binary Converters DesignEvangelos Vassalos, Dimitris Bakalis, Haridimos T. Vergos. dsd 2012: 65-72 [doi]

Area-time efficient multi-modulus adders and their applicationsHaridimos T. Vergos, Dimitris Bakalis. mam, 36(5):409-419, 2012. [doi]

2011

2010

2009

2008

On the Use of Diminished-1 Adders for Weighted Modulo 2n + 1 Arithmetic ComponentsHaridimos T. Vergos, Dimitris Bakalis. dsd 2008: 752-759 [doi]

n + 1 multi-operand addersHaridimos T. Vergos, Dimitris Bakalis, Costas Efstathiou. icecsys 2008: 694-697 [doi]

2006

A core generator for arithmetic cores and testing structures with a network interfaceDimitris Bakalis, K. Adaos, D. Lymperopoulos, Maciej Bellos, Haridimos T. Vergos, George Alexiou, Dimitris Nikolos. jsa, 52(1):1-12, 2006. [doi]

2004

2002

On the design of low power BIST for multipliers with Booth encoding and Wallace tree summationDimitris Bakalis, Emmanouil Kalligeros, Dimitris Nikolos, Haridimos T. Vergos, George Alexiou. jsa, 48(4-5):125-135, 2002. [doi]

Bit-Serial Test Pattern Generation by an Accumulator Behaving as a Non-Linear Feedback Shift RegisterGiorgos Dimitrakopoulos, Dimitris Nikolos, Dimitris Bakalis. iolts 2002: 152-157 [doi]

On-the-Fly Reseeding: A New Reseeding Technique for Test-Per-Clock BISTEmmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos. et, 18(3):315-332, 2002. [doi]

An Efficient Seeds Selection Method for LFSR-Based Test-per-Clock BISTEmmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos. isqed 2002: 261-266 [doi]

A new built-in TPG method for circuits with random patternresistant faultsXrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos, Spyros Tragoudas. tcad, 21(7):859-866, 2002. [doi]

2001

Δομές ενσωματωμένου αυτοελέγχου για ψηφιακά κυκλώματα πολύ μεγάλης κλίμακας ολοκλήρωσηςDimitris Bakalis. PhD thesis, University of Patras, Greece, 2001. [doi]

EUDOXUS: A WWW-based Generator of Reusable Arithmetic CoresDimitris Bakalis, K. Adaos, George Alexiou, Dimitris Nikolos, D. Lymperopoulos. rsp 2001: 182-187 [doi]

On Accumulator-Based Bit-Serial Test Response Compaction SchemesDimitris Bakalis, Dimitris Nikolos, Haridimos T. Vergos, Xrysovalantis Kavousianos. isqed 2001: 350 [doi]

A New Reseeding Technique for LFSR-Based Test Pattern GenerationEmmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos. iolts 2001: 80-86 [doi]

A novel reseeding technique for accumulator-based test pattern generationXrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos. glvlsi 2001: 7-12 [doi]

On the Design of Self-Testing Checkers for Modified Berger CodesStanislaw J. Piestrak, Dimitris Bakalis, Xrysovalantis Kavousianos. iolts 2001: 153-157 [doi]

2000

Low Power BIST for Wallace Tree-Based Fast MultipliersDimitris Bakalis, Dimitris Nikolos, George Alexiou, Emmanouil Kalligeros, Haridimos T. Vergos. isqed 2000: 433-438 [doi]

Test response compaction by an accumulator behaving as a multiple input non-linear feedback shift registerXrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos. itc 2000: 804-811

1999

Low Power Dissipation in BIST Schemes for Modified Booth MultipliersXrysovalantis Kavousianos, Dimitris Bakalis, Haridimos T. Vergos, Dimitris Nikolos, George Alexiou. dft 1999: 121-129 [doi]

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2015

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2011

2010

2009

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2006

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2002

2001

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1999

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