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Efficient architectures for modulo 2n-1 squares

Anastasia Spyrou, Dimitris Bakalis, Haridimos T. Vergos. Efficient architectures for modulo 2n-1 squares. In 16th International Conference on Digital Signal Processing, DSP 2009, Santorini, Greece, July 5-7, 2009. pages 1-6, IEEE, 2009. [doi]

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