On-chip traffic regulation to reduce coherence protocol cost on a microthreaded many-core architecture with distributed caches - researchr publication

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Qiang Yang 0006, Jian Fu, Raphael Poss, Chris R. Jesshope. On-chip traffic regulation to reduce coherence protocol cost on a microthreaded many-core architecture with distributed caches. ACM Trans. Embedded Comput. Syst., 13(3s), 2014. [doi]

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