Raphael Poss - researchr alias

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Viewing Publication 1 - 19 from 19

2020

2016

3: Towards A Hardware Unix Accelerator for Many-CoresRaphael Poss, Koen Koning. tpds, 27(8):2208-2221, 2016. [doi]

2014

On-chip traffic regulation to reduce coherence protocol cost on a microthreaded many-core architecture with distributed cachesQiang Yang 0006, Jian Fu, Raphael Poss, Chris R. Jesshope. tecs, 13(3s), 2014. [doi]

Rethread: A Low-Cost Transient Fault Recovery Scheme for Multithreaded ProcessorsJian Fu, Qiang Yang 0006, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang. IEEEares 2014: 88-93 [doi]

A fault detection mechanism in a Data-flow scheduled Multithreaded processorJian Fu, Qiang Yang 0006, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang. date 2014: 1-4 [doi]

Multicore Architectures and Their Software LandscapeRaphael Poss. In Teofilo F. Gonzalez, Jorge Diaz-Herrera, Allen Tucker, editors, Computing Handbook, Third Edition: Computer Science and Software Engineering. CRC Press, 2014.

Academia 2.0: removing the publisher middle-man while retaining impactRaphael Poss, Sebastian Altmeyer, Mark Thompson, Rob Jelier. PLDI 2014: [doi]

Analytical-Based High-Level Simulation of the Microthreaded Many-Core ArchitecturesM. Irfan Uddin, Raphael Poss, Chris R. Jesshope. pdp 2014: 344-351 [doi]

Cache-based high-level simulation of microthreaded many-core architecturesM. Irfan Uddin, Raphael Poss, Chris R. Jesshope. jsa, 60(7):529-552, 2014. [doi]

Signature-based high-level simulation of microthreaded many-core architecturesM. Irfan Uddin, Raphael Poss, Chris R. Jesshope. simultech 2014: 509-516 [doi]

2013

2012

An infrastructure for multi-level optimisation through property annotation and aggregationFrank Penczek, Raimund Kirner, Raphael Poss, Clemens Grelck, Alex Shafarenko. MoDELS 2012: [doi]

Heterogeneous integration to simplify many-core architecture simulationsRaphael Poss, Mike Lankamp, M. Irfan Uddin, Jaroslav Sykora, Leos Kafka. rapido 2012: 17-24 [doi]

Lazy reference counting for the microgridRaphael Poss, Clemens Grelck, Stephan Herhut, Sven-Bodo Scholz. IEEEinteract 2012: 41-48 [doi]

Apple-CORE: Microgrids of SVP Cores - Flexible, General-Purpose, Fine-Grained Hardware Concurrency ManagementRaphael Poss, Mike Lankamp, Qiang Yang 0006, Jian Fu, Michiel W. van Tol, Chris R. Jesshope. dsd 2012: 501-508 [doi]

Collecting signatures to model latency tolerance in high-level simulations of microthreaded coresM. Irfan Uddin, Chris R. Jesshope, Michiel W. van Tol, Raphael Poss. rapido 2012: 1-8 [doi]

2010

Concurrent Non-deferred Reference Counting on the Microgrid: First ExperiencesStephan Herhut, Carl Joslin, Sven-Bodo Scholz, Raphael Poss, Clemens Grelck. IFL 2011: 185-202 [doi]

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