Error-tolerant bit generation techniques for use with a hardware-embedded path delay PUF

Jim Aarestad, Jim Plusquellic, Dhruva Acharyya. Error-tolerant bit generation techniques for use with a hardware-embedded path delay PUF. In 2013 IEEE International Symposium on Hardware-Oriented Security and Trust, HOST 2013, Austin, TX, USA, June 2-3, 2013. pages 151-158, IEEE, 2013. [doi]

Abstract

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