Rami A. Abdallah, Naresh R. Shanbhag. A 14.5 fJ/cycle/k-gate, 0.33 V ECG processor in 45nm CMOS using statistical error compensation. In Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012, San Jose, CA, USA, September 9-12, 2012. pages 1-4, IEEE, 2012. [doi]
Abstract is missing.