High-Level Modeling and FPGA Prototyping of Produced Order Parallel Queue Processor Core

Ben A. Abderazek, Tsutomu Yoshinaga, Masahiro Sowa. High-Level Modeling and FPGA Prototyping of Produced Order Parallel Queue Processor Core. The Journal of Supercomputing, 38(1):3-15, 2006. [doi]

Abstract

Abstract is missing.