An energy-efficient high-level synthesis algorithm for huddle-based distributed-register architectures

Shin-ya Abe, Masao Yanagisawa, Nozomu Togawa. An energy-efficient high-level synthesis algorithm for huddle-based distributed-register architectures. In 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012. pages 576-579, IEEE, 2012. [doi]

Authors

Shin-ya Abe

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Masao Yanagisawa

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Nozomu Togawa

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