An energy-efficient high-level synthesis algorithm for huddle-based distributed-register architectures

Shin-ya Abe, Masao Yanagisawa, Nozomu Togawa. An energy-efficient high-level synthesis algorithm for huddle-based distributed-register architectures. In 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012. pages 576-579, IEEE, 2012. [doi]

@inproceedings{AbeYT12,
  title = {An energy-efficient high-level synthesis algorithm for huddle-based distributed-register architectures},
  author = {Shin-ya Abe and Masao Yanagisawa and Nozomu Togawa},
  year = {2012},
  doi = {10.1109/ISCAS.2012.6272096},
  url = {http://dx.doi.org/10.1109/ISCAS.2012.6272096},
  researchr = {https://researchr.org/publication/AbeYT12},
  cites = {0},
  citedby = {0},
  pages = {576-579},
  booktitle = {2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012},
  publisher = {IEEE},
  isbn = {978-1-4673-0218-0},
}