The following publications are possibly variants of this publication:
- Design of an efficient communication infrastructure for highly contended locks in many-core CMPsJosé L. Abellán, Juan Fernández, Manuel E. Acacio. jpdc, 73(7):972-985, 2013. [doi]
- Efficient Dir0B Cache Coherency for Many-Core CMPsJosé L. Abellán, Alberto Ros, Juan Fernández, Manuel E. Acacio. iccs 2013: 2545-2548 [doi]
- Efficient and scalable barrier synchronization for many-core CMPsJosé L. Abellán, Juan Fernández, Manuel E. Acacio. cf 2010: 73-74 [doi]
- Efficient Hardware Barrier Synchronization in Many-Core CMPsJosé L. Abellán, Juan Fernández, Manuel E. Acacio. tpds, 23(8):1453-1466, 2012. [doi]
- ECONO: Express coherence notifications for efficient cache coherency in many-core CMPsJosé L. Abellán, Alberto Ros, Juan Fernández Peinador, Manuel E. Acacio. samos 2013: 237-244 [doi]
- A G-Line-Based Network for Fast and Efficient Barrier Synchronization in Many-Core CMPsJosé L. Abellán, Juan Fernández, Manuel E. Acacio. icpp 2010: 267-276 [doi]