Abstract is missing.
- Towards chip-on-chip neuroscience: fast mining of neuronal spike streams using graphics hardwareYong Cao, Debprakash Patnaik, Sean P. Ponce, Jeremy S. Archuleta, Patrick Butler, Wu-chun Feng, Naren Ramakrishnan. 1-10 [doi]
- SpiNNaker: impact of traffic locality, causality and burstiness on the performance of the interconnection networkJavier Navaridas, Luis A. Plana, José Miguel-Alonso, Mikel Luján, Stephen B. Furber. 11-20 [doi]
- Scalable event-driven native parallel processing: the SpiNNaker neuromimetic systemAlexander D. Rast, Xin Jin, Francesco Galluppi, Luis A. Plana, Cameron Patterson, Stephen B. Furber. 21-30 [doi]
- Operating system support for mitigating software scalability bottlenecks on asymmetric multicore processorsJuan Carlos Saez, Alexandra Fedorova, Manuel Prieto, Hugo Vegas. 31-40 [doi]
- Efficient cache design for solid-state drivesMiaoqing Huang, Olivier Serres, Vikram K. Narayana, Tarek A. El-Ghazawi, Gregory B. Newby. 41-50 [doi]
- Programmable matter with self-reconfiguring robotsDaniela Rus. 51-52 [doi]
- Supporting lock-free composition of concurrent data objectsDaniel Cederman, Philippas Tsigas. 53-62 [doi]
- Collaborative scheduling of DAG structured computations on multicore processorsYinglong Xia, Viktor K. Prasanna. 63-72 [doi]
- Efficient and scalable barrier synchronization for many-core CMPsJosé L. Abellán, Juan Fernández, Manuel E. Acacio. 73-74 [doi]
- A communication infrastructure for a million processor machineAndrew D. Brown, Steve Furber, Jeff S. Reeve, Peter R. Wilson, Mark Zwolinski, John E. Chad, Luis A. Plana, David R. Lester. 75-76 [doi]
- A hyperscalar multi-core architectureJih-Ching Chiu, Yu-Liang Chou, Ding-Siang Su. 77-78 [doi]
- Augmenting cache partitioning with thread-aware insertion/promotion policies to manage shared cachesXiufeng Sui, Junmin Wu, Guoliang Chen, Yixuan Tang, Xiaodong Zhu. 79-80 [doi]
- Performance and power evaluation of an in-line acceleratorAlejandro Rico, Jeff H. Derby, Robert K. Montoye, Timothy H. Heil, Chen-Yong Cher, Pradip Bose. 81-82 [doi]
- Energy efficient biomolecular simulations with FPGA-based reconfigurable computingAnanth Nallamuthu, Melissa C. Smith, Scott S. Hampton, Pratul K. Agarwal, Sadaf R. Alam. 83-84 [doi]
- Efficient implementation of GPGPU synchronization primitives on CPUsJayanth Gummaraju, Ben Sander, Laurent Morichetti, Benedict R. Gaster, Lee W. Howes. 85-86 [doi]
- Efficient pattern matching on GPUs for intrusion detection systemsAntonino Tumeo, Oreste Villa, Donatella Sciuto. 87-88 [doi]
- Efficient parallel implementation of multilayer backpropagation networks on SpiNNakerXin Jin, Mikel Luján, Luis A. Plana, Alexander D. Rast, Stephen R. Welbourne, Steve Furber. 89-90 [doi]
- Porting existing cache-oblivious linear algebra HPC modules to larrabee architectureAlexander Heinecke, Carsten Trinitis, Josef Weidendorfer. 91-92 [doi]
- Novel low-cost aging sensorMartin Omaña, Daniele Rossi, Nicolò Bosio, Cecilia Metra. 93-94 [doi]
- A high-speed AES architecture implementationFlavius Opritoiu, Mircea Vladutiu, Lucian Prodan, Mihai Udrescu. 95-96 [doi]
- A predictable communication assistAhsan Shabbir, Sander Stuijk, Akash Kumar, Bart D. Theelen, Bart Mesman, Henk Corporaal. 97-98 [doi]
- Exploitation of nested thread-level speculative parallelism on multi-core systemsArun Kejariwal, Milind Girkar, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander V. Veidenbaum, Utpal Banerjee, Constantine D. Polychronopoulos. 99-100 [doi]
- Combining deblurring and denoising for handheld HDR imaging in low light conditionsPandya Lakshman. 101-102 [doi]
- From volunteer to cloud computing: cloud@homeVincenzo D. Cunsolo, Salvatore Distefano, Antonio Puliafito, Marco Scarpa. 103-104 [doi]
- Design of a cloud naming frameworkAntonio Celesti, Massimo Villari, Antonio Puliafito. 105-106 [doi]
- A service-based approach for the execution of scientific workflows in gridsAndrea Bosin, Nicoletta Dessì, Madusudhanan Bairappan. 107-108 [doi]
- Variability-tolerant run-time workload allocation for MPSoC energy minimization under real-time constraintsFrancesco Paterna, Andrea Acquaviva, Alberto Caprara, Francesco Papariello, Giuseppe Desoli, Luca Benini. 109-110 [doi]
- A portable parallel finite element simulation systemYufeng Nie, Lei Wang, Weiwei Zhang. 111-112 [doi]
- Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessorsDaniele Rossi, Martin Omaña, Gianluca Berghella, Cecilia Metra, Abhijit Jas, Chandra Tirumurti, Rajesh Galivanche. 113-114 [doi]
- Automatic tuning of MPI runtime parameter settings by using machine learningSimone Pellegrini, Thomas Fahringer, Herbert Jordan, Hans Moritsch. 115-116 [doi]
- Exposing parallelism and locality in a runtime parallel optimization frameworkDavid A. Penry, Daniel J. Richins, Tyler S. Harris, David Greenland, Koy D. Rehme. 117-118 [doi]
- ERBIUM: a deterministic, concurrent intermediate representation for portable and scalable performanceCupertino Miranda, Philippe Dumont, Albert Cohen, Marc Duranton, Antoniu Pop. 119-120 [doi]
- NCID: a non-inclusive cache, inclusive directory architecture for flexible and efficient cache hierarchiesLi Zhao, Ravi Iyer, Srihari Makineni, Don Newell, Liqun Cheng. 121-130 [doi]
- Global management of cache hierarchiesMohamed Zahran, Sally A. McKee. 131-140 [doi]
- Where replacement algorithms fail: a thorough analysisGeorgios Keramidas, Pavlos Petoumenos, Stefanos Kaxiras. 141-150 [doi]
- Nature-inspired techniques for self-organization in dynamic networksÖzalp Babaoglu. 151-152 [doi]
- Load balancing using dynamic cache allocationMiquel Moretó, Francisco J. Cazorla, Rizos Sakellariou, Mateo Valero. 153-164 [doi]
- EXACT: explicit dynamic-branch prediction with active updatesMuawya Al-Otoom, Elliott Forbes, Eric Rotenberg. 165-176 [doi]
- Hybrid parallel programming with MPI and unified parallel CJames Dinan, Pavan Balaji, Ewing L. Lusk, P. Sadayappan, Rajeev Thakur. 177-186 [doi]
- A heterogeneous parallel system running open mpi on a broadband network of embedded set-top devicesRichard Neill, Alexander Shabarshin, Luca P. Carloni. 187-196 [doi]
- Variant-based competitive parallel execution of sequential programsOliver Trachsel, Thomas R. Gross. 197-206 [doi]
- Enabling a highly-scalable global address space model for petascale computingVinod Tipparaju, Edoardo Aprà, Weikuan Yu, Jeffrey S. Vetter. 207-216 [doi]
- On-chip communication and synchronization mechanisms with cache-integrated network interfacesStamatis G. Kavadias, Manolis Katevenis, Michail Zampetakis, Dimitrios S. Nikolopoulos. 217-226 [doi]
- Models for generating locality-tuned traveling threads for a hierarchical multi-level heterogeneous multicorePatrick Anthony La Fratta, Peter M. Kogge. 227-236 [doi]
- Proposition for a sequential accelerator in future general-purpose manycore processors and the problem of migration-induced cache missesPierre Michaud, Yiannakis Sazeides, André Seznec. 237-246 [doi]
- High precision quantum query algorithm for computing AND-based boolean functionsAlina Vasilieva, Taisia Mischenko-Slatenkova. 247-256 [doi]
- Reversible online BIST using bidirectional BILBOJiaoyan Chen, Dilip P. Vasudevan, Emanuel M. Popovici, Michel P. Schellekens. 257-266 [doi]
- Power and performance optimization of voltage/frequency island-based networks-on-chip using reconfigurable synchronous/bi-synchronous FIFOsAmir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen. 267-276 [doi]
- Applying statistical machine learning to multicore voltage & frequency scalingMichael Moeng, Rami G. Melhem. 277-286 [doi]
- Interval-based models for run-time DVFS orchestration in superscalar processorsGeorgios Keramidas, Vasileios Spiliopoulos, Stefanos Kaxiras. 287-296 [doi]
- Multiple sleep modes leakage control in peripheral circuits of a all major SRAM-based processor unitsHouman Homayoun, Avesta Sasan, Aseem Gupta, Alexander V. Veidenbaum, Fadi J. Kurdahi, Nikil Dutt. 297-308 [doi]
- Towards greener data centers with storage class memory: minimizing idle power waste through coarse-grain management in fine-grain scaleIn Hwan Doh, Young-Jin Kim, Jung Soo Park, Eunsam Kim, Jongmoo Choi, Donghee Lee, Sam H. Noh. 309-318 [doi]
- Protective redundancy overhead reduction using instruction vulnerability factorDemid Borodin, Ben H. H. Juurlink. 319-326 [doi]
- Self organization on a swarm computing fabric: a new way to look at fault toleranceDanilo Pani, Simone Secchi, Luigi Raffo. 327-336 [doi]
- Dynamic load management for MMOGs in distributed environmentsHerbert Jordan, Radu Prodan, Vlad Nae, Thomas Fahringer. 337-346 [doi]
- Scalable simulation of complex network routing policiesAndrew Ian Stone, Steve DiBenedetto, Michelle Mills Strout, Daniel Massey. 347-356 [doi]