Extensible open-source framework for translating RTL VHDL IP cores to SystemC

Syed Saif Abrar, Maksim Jenihhin, Jaan Raik. Extensible open-source framework for translating RTL VHDL IP cores to SystemC. In Lukás Sekanina, Görschwin Fey, Jaan Raik, Snorre Aunet, Richard Ruzicka, editors, 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2013, Karlovy Vary, Czech Republic, April 8-10, 2013. pages 112-115, IEEE Computer Society, 2013. [doi]

Abstract

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