Low-Power Dual Dynamic Node Pulsed Hybrid Flip-Flop Featuring Efficient Embedded Logic

Kalarikkal Absel, Lijo Manuel, R. K. Kavitha. Low-Power Dual Dynamic Node Pulsed Hybrid Flip-Flop Featuring Efficient Embedded Logic. IEEE Trans. VLSI Syst., 21(9):1693-1704, 2013. [doi]

Abstract

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