Hisako Adachi, Shinji Nakamura. Efficient Designs for Adder Comparator. In Proceedings of the 41st Annual Conference on Information Sciences and Systems, CISS 2007, 14-16 March 2007, Johns Hopkins University, Department of Electrical Engineering, Baltimore, MD, USA. pages 754, IEEE, 2007. [doi]
@inproceedings{AdachiN07:0,
title = {Efficient Designs for Adder Comparator},
author = {Hisako Adachi and Shinji Nakamura},
year = {2007},
doi = {10.1109/CISS.2007.4298408},
url = {http://dx.doi.org/10.1109/CISS.2007.4298408},
researchr = {https://researchr.org/publication/AdachiN07%3A0},
cites = {0},
citedby = {0},
pages = {754},
booktitle = {Proceedings of the 41st Annual Conference on Information Sciences and Systems, CISS 2007, 14-16 March 2007, Johns Hopkins University, Department of Electrical Engineering, Baltimore, MD, USA},
publisher = {IEEE},
}