On Minimization of Test Application Time for RAS

Raghavendra Adiga, Gandhi Arpit, Virendra Singh, Kewal K. Saluja, Hideo Fujiwara, Adit D. Singh. On Minimization of Test Application Time for RAS. In VLSI Design 2010: 23rd International Conference on VLSI Design, 9th International Conference on Embedded Systems, Bangalore, India, 3-7 January 2010. pages 393-398, IEEE, 2010. [doi]

Authors

Raghavendra Adiga

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Gandhi Arpit

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Virendra Singh

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Kewal K. Saluja

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Hideo Fujiwara

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Adit D. Singh

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