Circuit optimization using statistical static timing analysis

Aseem Agarwal, Kaviraj Chopra, David Blaauw, Vladimir Zolotov. Circuit optimization using statistical static timing analysis. In William H. Joyner Jr., Grant Martin, Andrew B. Kahng, editors, Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005. pages 321-324, ACM, 2005. [doi]

Abstract

Abstract is missing.