A 128×128b high-speed wide-and match-line content addressable memory in 32nm CMOS

Amit Agarwal, Steven Hsu, Sanu Mathew, Mark Anders, Himanshu Kaul, Farhana Sheikh, Ram Krishnamurthy. A 128×128b high-speed wide-and match-line content addressable memory in 32nm CMOS. In Proceedings of the 37th European Solid-State Circuits Conference, ESSCIRC 2011, Helsinki, Finland, Sept. 12-16, 2011. pages 83-86, IEEE, 2011. [doi]

Abstract

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