Sukarn Agarwal, Hemangee K. Kapoor. Restricting writes for energy-efficient hybrid cache in multi-core architectures. In 2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016. pages 1-6, IEEE, 2016. [doi]
Abstract is missing.