Efficient Delay Test Generation for Modular Circuits

Nidhi Agrawal, Parul Agarwal, C. P. Ravikumar. Efficient Delay Test Generation for Modular Circuits. In 6th Great Lakes Symposium on VLSI (GLS-VLSI 96), March 22-23, 1996, Ames, IA, USA. pages 220, IEEE Computer Society, 1996. [doi]

Abstract

Abstract is missing.